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CMS8S589x Reference Manual

CMS8S589x series

Reference Manual

Enhanced flash memory 8-bit 1T 8051 microcontroller

Rev. 1.05

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CMS8S589x Reference Manual

Table of content

CMS8S589x series ..................................................................................................................... 2

1. Central processing unit（CPU） ...................................................................................... 11

1.1 Reset vector（0000H） ............................................................................................................................................... 11

1.2 BOOT Partition ............................................................................................................................................................. 11

1.3 Accumulator（ACC） .................................................................................................................................................. 13

1.4 B register（B） ........................................................................................................................................................... 13

1.5 Stack pointer register（SP）....................................................................................................................................... 13

1.6 Data pointer register（DPTR0/DPTR1） ................................ ................................................................ .................... 14

1.7 Data pointer selection register（DPS） ...................................................................................................................... 14

1.8 Program status register（PSW） ................................................................................................................................ 15

1.9 Program counter（PC） ............................................................................................................................................. 15

1.10 Timing access register（TA） ................................................................ ................................ ..................................... 16

2. Memory and register map ................................................................................................. 17

2.1 Program memory APROM ........................................................................................................................................... 17

2.2 Non-volatile data storage Data FLASH ....................................................................................................................... 18

2.3 Program memory BOOT ............................................................................................................................................. 18

2.4 General data memory RAM ................................................................................................ ......................................... 19

2.5 General external data register XRAM .......................................................................................................................... 21

2.6 Special function register SFR ...................................................................................................................................... 22

2.7 External special function register XSFR ...................................................................................................................... 23

3. Reset ................................ ................................ ................................................................ ... 29

3.1 Power-on reset ............................................................................................................................................................ 29

3.2 External Reset ............................................................................................................................................................. 31

3.3 LVR Low voltage reset................................................................................................................................................. 32

3.4 Watchdog reset ........................................................................................................................................................... 33

3.5 Window Watchdog Reset ............................................................................................................................................ 34

3.6 Software Reset ............................................................................................................................................................ 34

3.7 CONFIG state protection reset .................................................................................................................................... 34

3.8 Power-on configuration monitoring reset ..................................................................................................................... 34

4. Clock Structure .................................................................................................................. 35

4.1 System Clock Structure ............................................................................................................................................... 35

4.2 Related Registers ........................................................................................................................................................ 36

4.2.1 Oscillator Control register CLKDIV ........................................................................................................................36

4.2.2 Function clock control register ..................................................................................................................................37

5. Power management ................................................................................................ ........... 38

5.1 Power Management register PCON ............................................................................................................................ 38

5.2 Power Monitoring register LVDCON ............................................................................................................................ 39

5.3 IDLE idle mode ............................................................................................................................................................ 40

5.4 STOP sleep mode ....................................................................................................................................................... 40

5.4.1 Wake up from Sleep Mode .......................................................................................................................................40

5.4.2 Wake-up wait state ...................................................................................................................................................41

5.4.3 Sleep wake-up time ..................................................................................................................................................41

5.4.4 Reset operation in Sleep mode ................................................................................................................................41

5.4.5 Sleep power consumption in debug mode ...............................................................................................................41