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CMS8S589x Datasheet
CMS8S589x Datasheet
Enhanced 1T 8051 microcontroller with flash memory
Rev. 1.0.5
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CMS8S589x Datasheet
1. Product Features
1.1 Features
Compatible with MCS-51 1T instruction system
- The system clock frequency supports up to
48MHz
- The maximum machine cycle supports 1T
SYS
@
F
SYS
=16MHz
- The maximum machine cycle supports 2T
SYS
@
F
SYS
=24MHz
- The maximum machine cycle supports 3T
SYS
@
F
SYS
48MHz
Memory
- Maximum program FLASH: 648Bit
- Data FLASH: 48Bit
- Maximum Data BOOT FLASH: 168Bit
- General RAM: 256×8Bit
- Universal XRAM: 48Bit
- Program FLASH supports partition protection
4 oscillation modes
- HSI-Internal high-speed oscillation: 48MHz
- HSE-External high-speed oscillation:
8MHz/16MHz
- LSE-External low-speed oscillation: 32.768KHz
- LSI-Internal low-speed oscillation: 125KHz
Low voltage reset functionLVR
- 1.8V/2.0V/2.5V/3.5V
Low-voltage detection functionLVD
- 2.0V/2.2V/2.4V/2.7V/3.0V/3.7V/4.0V/4.3V
GPIO
- Up to 30 GPIOs
- All digital functions can be assigned to any GPIO
- Both support pull-up/down resistor function
- Both support edge (rising edge/ falling edge/ both
edge) interrupt
- Support wake-up function
Interrupt source
- Support all external port interrupts
- Up to 8 timer interrupts
- Other peripheral interrupts
Operating voltage range
- 2.1V5.5V
Operating temperature range
- -40℃~105
Communication module
- Up to 1xSPI (communication rate up to 6Mb/s)
- 1xI2C (communication rate up to 400Kb/s)
- Up to 2xUART (baud rate up to 1Mb/s)
Low power mode
- Idle modeIDLE
-
Sleep modeSTOP
Timer
- WDT timer (watchdog timer)
- Up to 5 timers:
Timer0/1Timer2Timer3/4
- LSE Timer (Support sleep wake function)
Buzzer driver
- 50% duty cycle, frequency can be set freely
Enhanced PWM
- 6 channels enhanced PWM
- 6 mutually independent cycle counters
- Support independent /complementary/
synchronous/ group mode
- Support edge alignment/center alignment
- Support complementary mode dead zone delay
function
- Support mask function and brake function
High-precision 12-bit ADC
- All GPIOs (30I/Os) support AD channels
- Optional reference voltage (2.0V/2.4V/3.0V/VDD)
- Can detect internal 1.2V reference voltage
- Support hardware trigger start conversion function
- Support a set of result digital comparison function
Support 96-bit unique ID number (UID)
- Each chip has an independent ID number
Support two-wire serial programming and debugging