R01DS0420EJ0100 Rev.1.00 Page 1 of 70
Oct. 17, 2022
DATASHEET
1. OUTLINE
1.1 Features
Low power consumption technology
V
DD
= single power supply volt age of 2.4 to 5.5 V
HALT mode
STOP mode
RL78 CPU core
CISC architecture with 3-stage pipeline
Minimum instruction exec ution time: Can be changed
from high speed (0.0625 μs: @ 16 MHz operation
with high-speed on-chip oscillator) to low speed
(1.0 μs: @ 1 MHz operation)
Address space: 1 MB
General-purpose registers: (8-bit regist er × 8) ×
4 banks
On-chip RAM: 1 KB
Code flash memory
Code flash memory: 4 to 8 KB
Block size: 1 KB
Only write after erase is possible
On-chip debug func tion
Self-programming (with no boot swap funct ion/flash
shield window function)
Data flash memory
Data flash mem ory: 1 KB
Block size: 512 B
Unit of rewrites: 32 bits
Background operation (BG O) is not supported
(instructions cannot be ex ec uted from the code flash
memory while rewriting the data flash memory)
Number of rewrites: 1,000,000 times (TYP.)
Voltage of rewrites: V
DD
= 2.4 to 5.5 V
High-speed on -chip oscillator
Select from 16 MHz, 8 MHz, 4 MH z, 2 MHz, and
1 MHz
Frequency accuracy ±1.0%
(V
DD
= 2.4 to 5.5 V, T
A
= −20 to +85°C)
(G: Industr i al applicatio ns , M: Industrial applications)
Frequency accuracy ±1.5%
(V
DD
= 2.4 to 5.5 V, T
A
= −40 to −20°C)
(G: Industr i al applicatio ns , M: Industrial applications)
Frequency accuracy ±2.0%
(V
DD
= 2.4 to 5.5 V, T
A
= +85 to +125°C)
(G: Industr i al applicatio ns , M: Industrial applications)
Frequency accuracy ±2.0%
(V
DD
= 2.4 to 5.5 V, T
A
= −40 to +85°C)
(A: Consumer applicat i ons)
Operating ambient temperature
T
A
= −40 to +85°C (A: Consumer app li c ations)
T
A
= −40 to +105°C (G: Industrial ap pli cations )
T
A
= −40 to +125°C (M: I ndustrial applications)
Power management and reset function
On-chip selectable power-on-reset (SPOR) circuit
(Select reset from 3 levels, stop setting is available)
Serial interf ace
Simplified SPI (CSI
Note 1
):
1 to 2 channels
UART:
1 channel
Simplified I
2
C:
1 to 2 channels
I
2
C:
1 channel
Note 1. Although the C S I function is generally calle d
SPI, it is als o called CSI in this product, so it
is referred to as such in this m anual.
Timer
16-bit timer:
8 channels
12-bit interval timer:
1 channel
Watchdog timer:
1 channel (
operable with the
dedicated low
-speed on-chip
oscillator)
RL78/G15
RENESAS MCU
True low
-power platform, 54-µA/MHz operating current, T
A
= 125��C operation, from 8 to 20 pins,
4 to 8 KB code flash memory, 1 KB RAM, 2.4 to 5.5 V
R01DS0420EJ0100
Rev.1.00
Oct. 17, 2022
RL78/G15 1. OUTLINE
R01DS0420EJ0100 Rev.1.00 Page 2 of 70
Oct. 17, 2022
A/D convert er
8/10-bit resolution A/D conv erter (V
DD
= 2.4 to 5.5 V)
Analog input: 3 to 11 channels
Internal reference voltage (0.815 V (TY P.))
Comparator
1 to 2 channels
Operation mode: High-speed mode, low-speed mode
External reference volta ge or internal reference
voltage can be s el ec ted as the reference voltage.
I/O port
I/O port: 6 to 18 (N-ch open drain output [withstand
voltage of V
DD
]: 2 to 9)
Can be set to N-ch open drain and o n-c hi p pull-up
resistor
External int er rupt function: 8 channels
On-chip clock output/buzzer output controll er
Others
On-chip BCD (binary-coded decimal) correcti on
circuit
Remark The functions mounted depend on the
product. See 1.6 Outline of Functions.
ROM, RAM capacities
Flash ROM Data flash RAM RL78/G15
8 pins 10 pins 16 pins 20 pins
8 KB 1 KB 1 KB R5F12008 R5F12018 R5F12048 R5F12068
4 KB 1 KB 1 KB R5F12007 R5F12017 R5F12047 R5F12067