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1 Product Characteristics
Core
32-bit Arm
®
Cortex
®
-M4 core with
FPU
Up to 168MHz working frequency
Memory and interface
Flash: The capacity is up to 1MB
SRAM: System (192KB) + backup
(4KB)
EMMC: Support CF card, SRAM,
PSRAM, SDRAM, NOR and NAND
memories
Clock
HSECLK: 4~26MHz external
crystal/ceramic oscillator supported
LSECLK: 32.768KHz crystal/ceramic
oscillator supported
HSICLK: 16MHz RC oscillator
calibrated by factory
LSICLK: 28KHz RC oscillator
supported
PLL1: Phase locked loop; output
frequency is configured by four
parameters
PLL2: Phase locked loop specially
used to provide clock signals to I2S;
output frequency is configured by
three parameters
Reset and power
management
V
DD
range: 1.8～3.6V
V
DDA
range: 1.8～3.6V
V
BAT
range of backup domain power
supply: 1.65V～3.6V
Power-on/power-down/brown-out
reset (POR/PDR/BOR) supported
Programmable power supply voltage
detector (PVD) supported
Low-power mode
Sleep, stop and standby modes
supported
DMA
Two DMA; each DMA has 8 data
streams, 16 in total
Debugging interface
JTAG
SWD
I/O
Up to 140 I/O
All I/O can be mapped to external
interrupt vector
Up to 138 FT input I/O
Communication peripherals
4 USART, 2 UART, supporting
ISO7816, LIN and IrDA functions
3 I2C, supporting SMBus/PMBus
3 SPI (2 reusable I2S)
2 CAN
3 USB_OTG controllers
1 SDIO interface
Analog peripherals
3 12-bit ADCs
2 12-bit DACs
Timer
2 16-bit advanced timers TMR1/8
that can provide 7-channel PWM
output, support dead zone
generation and braking input
functions
2 32-bit general-purpose timers
TMR2/5, each with up to 4
independent channels to support
input capture, output comparison,
PWM, pulse count and other
functions
8 16-bit general-purpose timers
TMR/3/4/9/10/11/12/13/14, each with
up to 2 independent channels to
support input capture, output
comparison, PWM, pulse count and
other functions
2 16-bit basic timers TMR6/7
2 watchdog timers: one independent
watchdog IWDT and one window
watchdog WWDT
1 24-bit autodecrement SysTick
Timer
RTC
Support calendar function
Alarm and regular wake-up from
stop/standby mode
CRC computing unit
96-bit unique device ID