81
Process C1232
CMOS 1.2µm
EEPROM with Lateral PNP
Electrical Characteristics
T=25
o
C Unless otherwise noted
N-Channel Native Transistor
Symbol Minimum Typical Maximum Unit Comments
Threshold Voltage VT
ZBN
–0.20 0.37 0.52 V 100x2.5µ
m
Body Factor
γ
ZBN
0.30 0.45 0.60 V
1/2
100x2.5µm
Saturation Current I
DSATN
13 15.7 18.9 mA 100x2.5µm
Conduction Factor
β
ZBN
45 55 65
µA/V
2
100x100µ
m
N-Channel T ransistor Symbol Minimum Typical Maximum Unit Comments
Threshold Voltage VT
N
0.30 0.475 0.65 V 100x10
µm
Body Factor
γ
N
0.35 0.45 0.55 V
1/2
100x100
µ
m
Conduction Factor β
N
64 78 92
µA/V
2
100x100
µm
Saturation Current I
DSATN
16 25 40 mA 100x1.5
µ
m
Punch Through V oltage
BVDSS
N
5 V
Poly Field Threshold VTF
P(N)
8 V
P-Channel T ransistor Symbol Minimum Typical Maximum Unit Comments
Threshold Voltage VT
P
–0.65 –0.475 0.30 V 100x1.2µm
Body Factor
γ
P
0.5 0.6 0.7 V
1/2
100x1.2µm
Conduction Factor β
P
20 25 30 µ
A/V
2
100x100µ
m
Saturation Current I
DSATP
–6 –10 –16 mA 100x1.5µ
m
Punch Through V oltage
BVDSS
P
–5 V
Poly Field Threshold Voltage
VTF
P(P)
–8 V
EECMOS Characteristics Symbol Minimum Typical Maximum Unit Comments
Tunnel Oxide Thickness T
TUNLOX
84 88 92 nm
Interpoly Oxide Thickness T
P1P2
340 390 440 nm
Buried N+ Sheet Res.
ρ
BN+
200 300 400 Ω/o
Initial Program/Erase Window
3.0 V
Unprog. Memory Threshold V
T
3.0 V
Endurance 10,000 Cycles
Programming Voltage VPP 12 14 17 V
Lateral PNP Symbol Minimum Typical Maximum Unit Comments
Beta H
FE
10 35 100
Early Voltage V
AP
TBD V
ISO 9001 Registered
®
© Daily Silver IMP
82
C1232
Physical Characteristics
Process C1232
Diffusion & Thin Films Symbol Minimum Typical Maximum Unit Comments
Well (field) Sheet Resistance
ρ
N-well(f)
1.2 20 2.8 K
Ω
/
o
n-well
N+ Sheet Resistance
ρ
N+
20 35 50
Ω
/
o
N+ Junction Depth x
jN+
0.35 µm
P+ Sheet Resistance
ρ
P+
60 110 160 Ω/o
P+ Junction Depth x
jP+
0.35 µm
Gate Oxide Thickness T
GOX
22.5 25.0 27.5 nm
Field Oxide Thickness T
FIELD
700 nm
Gate
Poly Sheet Res.
ρ
POLY2
25 35 45
Ω/o
Bottom Poly Sheet Res.
ρ
POLY1
24 32 40 Ω/o
High Resistance Poly
ρ
POLYHI
1.5 2.0 2.5 kΩ
/o
Metal-1 Sheet Resistance
ρ
M1
50 mΩ
/o
Metal-2 Sheet Resistance
ρ
M2
19 25 32 mΩ/o
P assivation Thic kness T
PASS
200+900 nm o xide+nit.
Capacitance Symbol Minimum Typical Maximum Unit Comments
Gate Oxide C
OX
1.28 1.38 1.58 fF/µm
2
Metal-1 to Poly1 C
M1P
0.057 fF/µm
2
Metal-1 to Silicon C
M1S
0.028 fF/µm
2
Metal-2 to Metal-1 C
MM
0.035 fF/µm
2
Poly-1 to Poly-2 C
P1P1
0.86 fF/µm
2
Starting Material P <100> High Poly Width/Space 1.5 / 1.5µ
m
Starting Mat. Resistivity 25 - 50 Ω-cm N+/P+ Width/Space 2.0 / 2.0µm
Epi Layer P Type, 7 - 8.5
Ω
-cm N+ To P+ Space 9.0
µm
with N+ Buried Layer Tunnel Oxide Width/Space 1.5 / 1.5µm
Operating Voltage 5V
Tunnel Ox. Overlap Bot. Poly
1.0µm
Well Type N-well Contact To Poly Space 1.5
µm
Metal Layers 2 Contact Overlap Of Diffusion 1.0µm
Poly Layers 2 Contact Overlap Of Poly 1.0µ
m
Contact Size 1.5x1.5
µm Metal-1 Overlap Of Contact 1.0
µm
Via Size 1.5x1.5µ
m Metal-1 Overlap Of Via 1.0µ
m
Metal-1 Width/Space 2.5 / 1.5µm Metal-2 Overlap Of Via 1.0µm
Metal-2 Width/Space 2.5 / 1.5µm Minimum Pad Opening 65x65µm
Gate Poly Width/Space 1.5 / 2.0µm Minimum Pad-to-Pad Spacing 5.0µm
Buried N+ Width/Space 2.5 / 1.75µm Minimum Pad Pitch 80.0µm
Special Feature of C1232 Process: EEPROM process with high resistivity poly resistors
and native n-channel devices.
Electrical Characteristics