P-Channel Enhancement Mode Field Effect Transistor
Product Summary
-40V
-4.4A
90mohm
150mohm
V
DS
I
D
R
DS(ON)
( at V
GS
=-10V)
R
DS(ON)
( at V
GS
=-4.5V)
General Description
● Trench Power LV MOSFET technology
High density cell design for Low R
DS(ON)
High Speed switching
Absolute Maximum Ratings (T
A
=25unless otherwise noted)
Parameter
Symbol
Maximum
Unit
Drain-source Voltage V
DS
-40 V
Gate-source Voltage V
GS
±20
V
Drain Current I
D
-4.4
A
Pulsed Drain Current
A
I
DM
-15 A
Total Power Dissipation @ T
A
=25
P
D
1.5 W
Thermal Resistance Junction-to-Ambient
B
R
θJA
82
/ W
Junction and Storage Temperature Range T
J
,T
STG
-55+150
SL2319A
1
www.slkormicro.com
Electrical Characteristics (T
J
=25 unless otherwise noted)
Parameter
Symbol
Conditions Min Typ Max Units
Static Parameter
Drain-Source Breakdown Voltage BV
DSS
V
GS
= 0V, I
D
=-250μA -40 V
Zero Gate Voltage Drain Current I
DSS
V
DS
=-32V,V
GS
=0V,T
C
=25
-1 μA
Gate-Body Leakage Current I
GSS
V
GS
= ±20V, V
DS
=0V
±100
nA
Gate Threshold Voltage V
GS(th)
V
DS
= V
GS
, I
D
=-250μA -1.0 -2.5 V
Static Drain-Source On-Resistance R
DS(ON)
V
GS
= -10V, I
D
=-2.0A 90
V
GS
= -4.5V, I
D
=-1.0A 150
Diode Forward Voltage V
SD
I
S
=-2.5A,V
GS
=0V -0.8 -1.2 V
Maximum Body-Diode Continuous Current I
S
-2.0 A
Dynamic Parameters
Input Capacitance C
iss
V
DS
=-30V,V
GS
=0V,f=1MHZ
553
pF Output Capacitance C
oss
29
Reverse Transfer Capacitance C
rss
20
Switching Parameters
Total Gate Charge Q
g
V
GS
=-10V,V
DS
=-30V,I
D
=-1.0A
4.3
nC Gate Source Charge Q
gs
1.1
Gate Drain Charge Q
gd
1.5
Turn-on Delay Time t
D(on)
V
GS
=-10V,V
DD
=-50V, I
D
=-1A,
R
GEN
=2.5Ω
12
ns
Turn-on Rise Time t
r
6.8
Turn-off Delay Time t
D(off)
33
Turn-off Fall Time t
f
3
A. Pulse Test: Pulse Width300us,Duty cycle 2%.
B. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch.
-1.9
SL2319A
2
www.slkormicro.com