T
w
o
f
u
lly
p
r
og
r
amma
b
l
e se
r
ial 1
/
0
c
hannels
(DC
TO
512K BAU
D )
T
ri-st
ate TTL driv
e cap
abilities for
bi-directional data bus and control bus
on
each
cha
nnel
Loopback control for c
ommunications
li
n
k
f
a
u
lt
is
o
la
t
i
o
n
f
o
r
e
a
ch
U
A
RT
Line b
rea
k ge
ner
ation a
nd detec
tion
fo
r each U
ART
Complete s
t
atus
reporti
n
g
ca
p
abiliti
e
s
Generation and stripping of serial
asynchronous data control bits
(
s
t
a
r
t
,
s
top
p
a
r
i
t
y
)
P
rogr
amm
ab
le
ba
ud r
ate
g
ene
ra
tor
an
d
mod
em co
nt
rol
sig
nals
fo
r each
c
ha
nnel
Ful
l
y
prio
r
i
tiz
e
d
ind
e
p
e
n
d
e
nt int
e
r
r
upt
sy
stem
cont
rols f
or
each
cha
nnel
16by
te FIFO buffe
rs
on both tran
smit
and
re
ceive o
f e
ach c
han
nel t
o redu
ce
numb
e
r
of
int
e
r
r
up
t
s
p
r
e
s
e
nt
e
d to
the
CPU
P
rogra
mmab
le FIFO
thres
hold love
s
of 1,4,8,or 14,bytes on each channel
Two modes of DMA signaling
a
vailabl
e fo
r tr
ansf
er
of d
ata
characters to and from FIFO buffers
Fully bi-directional centronics
compatible parallel port direct printer
interface
Adv
an
ced CM
OS l
ow
pow
er
t
ec
hnolog
y
with
si
ngle
+5v
oit s
upply
68-pin PLCC package
1
Data Communications
IMP16C552
IMP16C552
Key Features
Dual Universal Asynchronous
Receiver/Transmitter (UART)
with 16-BYTE FIFO & Parallel Printer Port
Pin
Configuration
.
.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
SOUT1
DTR1*
RTS1*
DSR1*
D0
D1
D2
D3
D4
D5
D6
D7
TXRdy0*
VCC
RTS0*
DTR0*
SOUT0
DSR
*D
INT2
SLIN*+
INIT*+
AFD*+
STB*+
VSS
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
INT0
BDO
VSS
DSRO*
RLSD0*
RI0*
DSR*
CSO*
A2
A1
AO
IOW*
IOR*
CSO*
RESET•
VCC
SIN0
TXRDy1*
VSS
Rxrdy0*
RISD1*
VSS
RI1*
DSR1*
CLK
CSO)
VSS
LPTOE*
ACK
PE
BUSY
SLCT
VCC
ERROR*
STS1
RXRdy1
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
16C552
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
IMP
www.ds-imp.com.cn Daily Silver IMP
The low power COMS IMP16C522 is a single
de
v
i
c
e
s
o
l
ut
i
on
f
or
s
e
r
v
i
n
g
t
w
o
s
e
r
i
a
l
input/
outpu
t por
ts
simul
tane
ousl
y and
one f
ully
bi-directional parallel port for the IBM PC ATM
PS
/
2 a
n
d
c
o
m
p
atible
s
y
s
t
e
m
s. The
p
a
r
all
e
l
po
r
t
is
f
ull
c
o
m
p
atib
l
e
t
o
t
h
e Cent
r
o
ni
c
s
p
r
in
t
er
po
rt and
IB
M se
rial
par
allel
Adapt
er.
Each
Univ
ersal
As
ync
hron
ous Re
cei
ver and
transmitter (UART) is fully programmable.
Ea
ch UAR
T in the IMP16C
522 is c
apa
ble of
buffering up to 16 bytes of data upon reception,
relieving the CPU of interrupt overhead.
Buffering of data also allows greater latency
time in interrupt servicing which is vital
in a multitasking environment, DMA signaling
between the internal FIFO buffers and host
CPU allows single or multiple character
transfers. Each UART has a maximum
recommended data rate of 256k with a clock
frequency of
8
0
MHZ
The IMP16C552 is an enhanced dual channel
version of the IMP16C550A Universal
Asynchronous Receiver and Transmitter
(UART) plus a bi-directional parallel data port
which fully support a Centronics compatible
printer int erface
The two serial input/output Universal
Asynchronous Receiver/Transmitter interface
simultaneously in microprocessor-based
system. Each UART performs parallel-to-serial
conversion on the outp ut and serial-to parallel
conversion on the input. Two modes of
operation exits for each I/0 channel after
a hardware reset. Each UART is functionally
com
patibl
e to the IMP16C4
50(c
hara
cter
mode)and an alternate mode (FIFO
mode)which is only available on the IMP16C552
It can be activated through software relieving
the CPU of excessive overhead due to due to
interrupts. The complete status of each UART
can be read at any time from internal
registers. The parallel port allows information
received from the data base to be printed. The
parallel port together with the two ser ial ports,
provides I BM PC ATM a nd PS/ 2tm com patible
with a single device solution.
2
Description
General
Description
IMP16C552
IMP16C552
www.ds-imp.com.cn Daily Silver IMP