Also included is a watchdog timer to stop and restart a
microprocessor that is “hung-up”. Three watchdog time-
out periods are selectable: 150ms, 610ms and 1,200ms. If the
ST input is not strobed LOW before the time-out period
expires, a reset is issued.
Devices are available in 8-pin DIP, 8-pin SO and compact
8-pin MicroSO packages.
1
Key Features
◆
Pin compatible with the Dallas Semiconductor
DS1832
— Over 40% lower supply current
◆
3.3V supply monitor
◆
Push-pull output
◆
Selectable watchdog period
◆
Debounce manual push-button reset input
◆
Precision temperature-compensated voltage
reference and comparator
◆
Power-up, power -down and brownout detection
◆
250ms minimum reset time
◆
Active LOW and HIGH reset signal
◆
Selectable trip point tolerance: 10% or 20%
◆
Low-cost 8-pin DIP/SO and 8-pin MicroSO
packages
◆
Wide operating temperature –40
°
C to +85
°
C
Block Diagram
V
CC
RESET
PBRST
1
1832_02.eps
40k
W
TOL
IMP1832
3
V
CC
–
+
10%/20% Tolerance
Selection
Reference
V
CC
8
6
TD
Push Button
Debounce
2
Watchdog
Timebase Selection
GND
4
Reset &
Watchdog Timer
ST
7
Watchdog
Transition Detector
V
CC
RESET
5
IMP1
IMP1
832
832
POWER MANAGEMENT
3.3V
3.3V
µ
µ
P P
P P
o
o
w
w
er Suppl
er Suppl
y
y
Monit
Monit
or and R
or and R
eset Cir
eset Cir
cuit
cuit
– Select
– Select
able T
able T
r
r
i
i
p
p
-P
-P
oint T
oint T
oler
oler
ance and
ance and
W
W
atc
atc
hdog P
hdog P
er
er
iod
iod
– Push-Butt
– Push-Butt
on R
on R
eset
eset
– Push-Pull R
– Push-Pull R
eset Outputs
eset Outputs
The IMP1832 microprocessor supervisor can halt and restart a “hung-
up” or “stalled” microprocessor, restart a microprocessor after a power
failure, and debounce a manual push-button microprocessor reset
switch. The IMP1832 features over 40% lower supply current than the
pin compatible Dallas Semiconductor DS1832.
Precision temperature compensated reference and comparator circuits
monitor the 3.3V, V
CC
input voltage. During power-up or when the V
CC
power supply falls outside selectable tolerance limits, both RESET and
RESET become active. When V
CC
rises above the threshold voltage, the
reset signals remain active for an additional 250ms minimum, allowing
the power supply and system microprocessor to stabilize. The trip point
tolerance signal, TOL, selects the trip level tolerance to be either 10- or
20-percent.
RESET and RESET outputs are push-pull.
A debounced manual reset input, PBRST, activates the reset outputs for
a minimum period of 250ms.
Daily Silver IMP www.ds-imp.com.cn
2
Pin Configuration
IMP1
IMP1
832
832
Pin Descriptions
IMP1832
5
1832_01.eps
RESET
6 RESET
7ST
8
4
3
2
1V
CC
GND
TOL
TD
PBRST
Ordering Information
DIP/SO/MicroSO
rebmuNtra
PegakcaP
erutarepmeTgnitarepO
egnaR
ylppuSmumixaM
(tnerruC
µ )A
gnirotinoMegatloV
noitacilppA
2381PMIPID-8 – 04C° 58otC° 02V3.3
S2381PM
IO
S-8
–
0
4C
°
58o
tC
°
0
2V
3.3
AMES2381PM
IO
SorciM-8
–
0
4C
°
58o
tC
°
0
2V
3.3
spe.10t_2381
Pin Number
8-Pin Package Name Function
1 PBRST Debounced manual pushbutton reset input
2 TD Watchdog time delay selection. (t
TD
= 150ms for TD = GND, t
TD
= 610ms for TD = Open,
and t
TD
=1200ms for TD = V
CC
)
3 TOL Selects 10% (TOL connected to GND) or 20% (TOL connected to V
CC
) trip point tolerance
4 GND Ground
5 RESET Active HIGH reset output. RESET is active:
1. If V
CC
falls below the reset voltage trip point.
2. IfPBRST is LOW.
3. If ST is not strobed LOW before the timeout period set by TD expires.
4. During power-up.
6 RESET Active LOW reset output. (See RESET)
7 ST Strobe Input
8V
CC
5V power
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