YSO9121MR
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Features
Any frequency between 1 MHz and 220 MHz accurate to 6 decimal places
LVPECL and LVDS output signaling types
0.6ps RMS phase jitter (random) over 12 kHz to 20 MHz bandwidth
Frequency stability as low as ±10 ppm
Industrial and extended commercial temperature ranges
Industry-standard packages: 3.2x2.5, 5.0x3.2 and 7.0x5.0 mmxmm
For frequencies higher than 220 MHz, refer to YSO9122MR datasheet
Applications
10GB Ethernet, SONET, SATA, SAS, Fibre Channel, PCI-Express
Telecom, networking, instrumentation, storage, servers
Electrical Characteristics
P
arameter and Conditions
Sym
bol
Mi
n.
Ty
p.
Max. Unit Co
ndition
L
VPECL and LVDS, Common Electrical Characteristics
Suppl
y Voltage Vdd 2.97 3.3 3.63 V
2.25 2.5 2.75 V
2.25 – 3.63 V Termination schemes in Figures 1 and 2 - XX ordering code
1.71 1.8 1.89 V Only for LVDS output
Output Frequency Range f 1 – 220 MHz
Frequency Stability F_stab -10 – +10 ppm
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, and load variations
-20 – +20 ppm
-25 – +25 ppm
-50 – +50 ppm
First Year Aging F_aging1 -2 – +2 ppm 25°C
10-year Aging F_aging10 -5 – +5 ppm 25°C
Operating Temperature Range T_use -40 – +85 °C Industrial
-20 – +70 °C Extended Commercial
Input Voltage High VIH 70% – – Vdd
Pin 1, OE or ST
I
nput Voltage Low VIL – – 30% Vdd
Pin 1, OE or ST
I
nput Pull-up Impedance Z_in – 100 250 kΩ
Pin 1, OE logic high or logic low, or ST
lo
gic high
2––MΩ
Pin 1, ST
lo
gic low
Start-up Time T_start – 6 10 ms Measured from the time Vdd reaches its rated minimum value.
Resume Time T_resume – 6 10 ms
In Standby mode, measured from the time ST
pin
crosses
50% threshold.
Duty Cycle DC 45 – 55 %
L
VPECL, DC and AC Characteristics
Cur
rent Consumption Idd – 61 69 mA Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE Disable Supply Current I_OE – – 35 mA OE = Low
Output Disable Leakage Current I_leak – – 1 A OE = Low
Standby Current I_std – – 100 A
ST
= Low, for all Vdds
Maximum Output Current I_driver – – 30 mA Maximum average current drawn from OUT+ or OUT-
Output High Voltage VOH Vdd-1.1 – Vdd-0.7 V See Figure 1(a)
Output Low Voltage VOL Vdd-1.9 – Vdd-1.5 V See Figure 1(a)
Output Differential Voltage Swing V_Swing 1.2 1.6 2.0 V See Figure 1(b)
Rise/Fall Time Tr, Tf – 300 700 ps 20% to 80%, see Figure 1(a)
OE Enable/Disable Time T_oe – – 115 ns f = 212.5 MHz - For other frequencies, T_oe = 100ns + 3 period
RMS Period Jitter T_jitt – 1.2 1.7 ps f = 100 MHz, VDD = 3.3V or 2.5V
– 1.2 1.7 ps f = 156.25 MHz, VDD = 3.3V or 2.5V
– 1.2 1.7 ps f = 212.5 MHz, VDD = 3.3V or 2.5V
RMS Phase Jitter (random) T_phj – 0.6 0.85 ps f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdds
L
VDS, DC and AC Characteristics
Cur
rent Consumption Idd – 47 55 mA Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE Disable Supply Current I_OE – – 35 mA OE = Low
Differential Output Voltage VOD 250 350 450 mV See Figure 2
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