FPGA IP CORE
iW-ARINC 664 P7 IP
www.iwavesystems.com
Features
Highlights
iWave’s ARINC 667 P7 IP is an Ethernet Technology that
provides a deterministic network to build an ARINC 667
P7 end system with guaranteed service to each
subscriber with free access to the network. This
protocol offers dedicated bandwidth for each node
with a guaranteed quality of service. iWave offers high
integrity and redundancy management, as well as
UDP/IP, profiled communication layer implemented in
hardware.
• Transmission Operation
o Supports up to 8 virtual transmission links (VL)
o Supports 1 port per VL
o Supports up to 8 transmit ports in total
o Supports BAG values of 1ms, 2ms, 4ms, 8ms, 16ms,
32ms, 64ms and 128ms
• Receiver Operation
o Supports up to 8 virtual reception links (VL)
o Supports 1 port per VL
o Supports up to 8 receive ports in total
• Supports queuing ports
• Supports Transmit Redundancy functionality
• Supports Receive Redundancy Check functionality for each
VL
• Supports AXI-4 stream interface for user data transmission
and reception
• Supports AXI-4 Lite interface for updating the Control and
Status Register
• Implements the ARINC 667
P7 End System
• Supports Virtual link
management
• Supports up to 8 transmit
and receiving ports
• Implement Redundancy
functionality at the Transmit
side
• Integrity checker and
Redundancy management
at the Receive side
iW - ARINC-664 P7
PHY
Rx
Interface
Tx
Interface
User
Interface
PHY
iW - ARINC 664 P7 FPGA IP
The IP can be ordered online from the iWave Website http://www.iwavesystems.com/product/arinc-664-afdx-ip/
Or from our Local Partners in your region http://www.iwavesystems.com/about-us/business-partner.html
iW – ARINC 664 P7 IP block diagram
Tx
Interface
ARINC 664 P7
Tx Ports Mux
Control &
Status Register
ARINC 664 P7
Rx Ports DeMux
UDP
Transmit
Redundancy
Controller and
Scheduler Logic
Integrity and
Redundancy Checker
Ethernet
MAC0
Ethernet
MAC1
Rx
Interface
User
Interface
PHY
PHY
ARINC 664 P7 IP Core
iWave Japan, Inc.
8F-B, Kannai Sumiyoshi Building,
3-29, Sumiyoshi-cho, Naka-ku,
Yokohama, Kanagawa, Japan.
Ph:+81-45-227-7626
Email: info@iwavejapan.co.jp
www.iwavejapan.co.jp
iWave Systems Tech. Pvt. Ltd.,
7/B, 29
th
Main, BTM Layout 2
nd
Stage,
Bangalore-560076,
India.
Ph:+91-80-26683700, 26786245
Email:mktg@iwavesystems.com
www.iwavesystems.com
iWave Europe
Postbus 6197
3130 DD Vlaardingen
The Netherlands
Ph: +31 10 28403383
Email: info@iwavesystems.eu
iWave Systems, a leading FPGA design house enhances your design productivity by providing an extensive suite of
proven, optimized and easy-to-use FPGA IP Cores along with reference designs to complement and quicken your
applications development. Our extensive suite of IP Cores covers all key markets and applications. Along with the rich
set of FPGA IP cores, iWave offers custom FPGA designs tailored to meet the client specifications which includes RTL
Design, Integration of iWave’s or 3rd Party IP Cores on our FPGA SOMs with Carrier Card/ Custom Hardware/ Off-the-
Shelf Evaluation Kits to provide end-to-end solutions targeting Low-Power, High-Performance and Optimized Designs
Deliverables
• Netlist
• IP example design
• IP datasheet
• Integration Manual
Licensing Options
• Non-Transferable: Single Project/Product
Netlist License – Single Site or Multi Site
• Non-Transferable: Multi Project/Product
Netlist License – Single Site or Multi Site
Technical Support
iWave provides comprehensive support during your system integration & validation.
• The Client may open a new support incident by emailing to a technical support engineer
• iWave’s response time shall be within 24 hours of the initial call, with the details of the action plan to
resolve
• Support assistance shall be delivered by telephone, email and/or remote assistance via a web meeting
• iWave shall provide remote debugging support irrespective of the time zone/ region
iWave USA.
1692 Westmont Ave.,
Campbell,
CA95008 USA
Ph: 408-206-5958
Email: info@iwavesystems.us