Rev. B, April 2022
Description
Features
Typical applications
Package
D
2
PAK-3L
650V-27mW SiC FET
w Low intrinsic capacitance
Marking
UJ3C065030B3
UJ3C065030B3
w Induction heating
w Motor drives
w EV charging
w PV inverters
w Switch mode power supplies
w Power factor correction modules
This SiC FET device is based on a unique ‘cascode’ circuit
configuration, in which a normally-on SiC JFET is co-packaged with a Si
MOSFET to produce a normally-off SiC FET device. The device’s
standard gate-drive characteristics allows for a true “drop-in
replacement” to Si IGBTs, Si FETs, SiC MOSFETs or Si superjunction
devices. Available in the D
2
PAK-3L package, this device exhibits ultra-
low gate charge and exceptional reverse recovery characteristics,
making it ideal for switching inductive loads and any application
requiring standard gate drive.
w Typical on-resistance R
DS(on),typ
of 27mW
w Maximum operating temperature of 175°C
w Excellent reverse recovery
w Low gate charge
Part Number
w ESD protected: HBM class 2 and CDM class C3
DATASHEET
UJ3C065030B3
TAB
D (2)
S (3)
G (1)
TAB
1
3
2
Datasheet: UJ3C065030B3 Rev. B, April 2022 1
Maximum Ratings
Symbol Value Units
V
DS
650 V
V
GS
-25 to +25 V
65 A
47 A
I
DM
230 A
E
AS
120 mJ
P
tot
242 W
T
J,max
175 °C
T
J
, T
STG
-55 to 175 °C
T
solder
260 °C
1. Limited by T
J,max
2. Pulse width t
p
limited by T
J,max
3. Starting T
J
= 25°C
Thermal Characteristics
Min Typ Max
R
qJC
0.48 0.62 °C/W
Reflow soldering temperature
reflow MSL 1
Power dissipation
T
C
= 25°C
Maximum junction temperature
Operating and storage temperature
T
C
= 25°C
Pulsed drain current
2
T
C
= 25°C
Single pulsed avalanche energy
3
Gate-source voltage
DC
Units
Parameter
Symbol
Test Conditions
Value
Thermal resistance, junction-to-case
L=15mH, I
AS
=4A
I
D
T
C
= 100°C
Continuous drain current
1
Parameter
Test Conditions
Drain-source voltage
Datasheet: UJ3C065030B3 Rev. B, April 2022 2