O-RAN Central Unit and Distributed
Unit
Last Updated: Jan 5, 2022
5G standards allow for deployment options with a flexible, functional split between networking
elements. This allows for implementations that are cloud/centralization centric.
O-RAN standards define the central unit as the entity responsible for Transport/S1, PDCP and
RRC/Control plane processing in an option 2 split configuration. Deployment options range
widely from low-end in-building processing with ≤25-50Gbps capacity to scale-out scenarios
supporting multiple Tbps aggregate processing.
The distributed unit is responsible for MAC/RLC and High-PHY processing, implemented as C
code on general-purpose (eg Arm) devices. Cost and power are minimized by using optimized
(Arm NEON) SIMD kernels and a look-aside accelerator device for forward error correction and
DSP processing acceleration.
O-RAN Block Diagram
NX P T echnology
Non NX P T echnology
Optional T echnology
Accelerator
Device
Multicore Arm Processor
T o RU
T o CU
PCIe
10 / 25 GbE
Recommended Products for O-RAN
Multicore Arm Processor
Layerscape
®
LX2160A, LX2120A, LX2080A Processors
Accelerator Device
Layerscape
®
Access LA1200 Programmable Baseband Processor
View our complete solution for O-RAN Central Unit and Distributed Unit.
Note: The information on this document is subject to change without notice.
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