Product Burn-in Test Services
Vineet Pancholi, Sr Director, Test Technology, WW Test Services, Amkor Technology, Inc.
Introduction
Product burn-in (BI) is an indispensable step in the production test flow to ensure good quality
and a properly functioning product for the customer. Amkor takes pride in rating ‘quality
delivered to the customer’ as one of the highest corporate virtues. See Figure 1.
Figure 1: Defects per Million (DPM) and DPM Goal Reported Over Five Years.
Burned-in integrated circuits (ICs) have a much lower failure rate during their operating life
than ICs which are not burned-in. As a result, test services with burn-in test equipment should
be available as a customer option.
The Reliability Bathtub Curve & the Impact of Burn-in
Researchers have shown that the reliability failure rate starts off high, as shown in Phase A in
Figure 2, then eventually drops to a constant level, as shown in Phase B. Manufacturers use
burn-in to remove the devices that make up early life failures before the product is shipped to
the customers. Early life “infant mortality” failures are trapped by subjecting the IC to
accelerated life test conditions, including elevated voltages and temperatures. Even with the
early failures removed from the population, the failure rate is reduced, but never eliminated
[1]. No amount of product burn-in completely eliminates all failures. The failures in the useful
product life (Phase B) are random in nature and cannot be traced back to be a systemic
fabrication or design related failure.
An increase in the failure rate is again observed toward the end of the useful life. This increase
in failure rate (Phase C in Figure 2) is attributed to effects like oxide wear out, electromigration,
time dependent dielectric breakdown and others [2].
Figure 2: Defect Rate Curve.
Latent defects are screened by application of stress (burn-in) conditions that accelerate the
cause of defects. Below is the Arrhenius equation for reliability that is used to calculate a
thermal acceleration factor for a given observed time-to-failure:
Equation 1:
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In this equation, A
T
is the acceleration factor due to changes in temperature, E
aa
is the
activation energy (eV), k is the Boltzmann’s constant (8.62 x 10
-5
eV/K), T
1
is the absolute test
temperature (K) and T
2
is the absolute system temperature (K). This equation helps the quality
and reliability engineering team to compute and model specific burn-in conditions for specific
silicon fabrication technologies, product designs and infant mortality (IM) goals in terms of
burn-in voltage, burn-in temperature and burn-in time. Burn-in voltage is typically about 30%
higher than the application use voltage and the burn-in temperature is typically between 95°C
to 105°C. These values result in a burn-in time (BIT) that could be a couple of seconds to a
couple of minutes and, depending on the die size, a couple of hours.
Burn-in is typically the first test step in the test flow after assembling the probed and sawed
wafer die into packages. While burn-in of packaged parts is popular with a large fraction of
customer devices, wafer-level burn-in may become important to the fraction of the product
volume targeted for mobile and handheld end applications in the future.
The benefits of burn-in concepts apply similarly for almost all fabrication technologies of digital,
analog and radio frequency (RF) ICs. Some Integrated Device Manufacturers (IDMs) request
burn-in test services for ICs that have digital logic, analog and RF end applications targeted for
automotive, industrial and commercial use. Memory product’s burn-in test methodology
focuses on retention of data in addition to the logic test methodologies for combinational logic
products. IC designers architect the test content (patterns) to ensure maximum toggle