1
© 2021 Copyright Super Micro Computer, Inc. All rights reserved November 2021
SOLUTION BRIEF
Executive Summary
Supermicro has closely partnered with AMD since
becoming one of the first server vendors to bring 1st
Gen AMD EPYC™ processors with “Zen”
microarchitecture to market in our H11 platforms in
2017. In 2019, Supermicro launched its first family of
H12 generation AMD processor-powered Supermicro
A+ servers with 2nd Gen AMD EPYC processors to
deliver a new level of integration and superior
performance for modern datacenters. Today, the
new 3rd Gen AMD EPYC Processors in the new
Supermicro A+ servers deliver up to 19% more
instructions per clock than the previous generation
1
.
3
rd
Gen AMD EPYC processors have up to 64 Zen 3
cores per CPU, introduce new levels of per-core cache
memory, and offer PCI 4.0 connectivity bandwidth.
They also include AMD Infinity Guard
2
, which offers
Secure Encrypted Virtualization-Secure Nested
Paging (SEV-SNP) to help enhance security in
TABLE OF CONTENTS
Executive Summary
...........................................
1
AMD EPYC Overview
...........................................
2
AMD EPYC 74F3 Processors Deliver Superior Performance
.....
3
Conclusion
.....................................................
12
APPENDIX A Oracle Linux & Configuration
...................
13
APPENDIX B Oracle Database 19c Configuration
............
15
SUPERMICRO
Supermicro (Nasdaq: SMCI), the leading innovator in high-
performance, high-efficiency server, and storage technology
is a premier global provider of advanced server Building Block
Solutions® for Enterprise Data Center, Cloud Computing,
Artificial Intelligence, and Edge Computing Systems.
Supermicro is committed to protecting the environment
through its “We Keep IT Green®” initiative and provides
customers with the most energy-efficient, environmentally
friendly solutions available on the market.
2
© 2021 Copyright Super Micro Computer, Inc. All rights reserved November 2021
virtualized environments. SEV-SNP expands on the SEV features found in earlier EPYC processors by
adding memory integrity capabilities that can help prevent hypervisor-based attacks by creating an
isolated execution environment for each virtual machine.
AMD EPYC 7003 Series Processors Deliver Flexibility, Performance, and Security Features
Overview
AMD EPYC 7003 Series Processors retain the proven Multi-Chip Module (MCM) Chiplet Architecture of
prior successful AMD EPYC server-class processors with further improvements and upgraded Zen 3
compute cores.
A. “Zen 3” Core Microarchitectural Overview
AMD EPYC 7003 Series Processors are built with new 7nm Zen
3 compute cores that provide an Instructions per Cycle (IPC)
uplift over previous Zen generations. Each core supports
Simultaneous Multi-threading (SMT) that allows running two
simultaneous threads per core when enabled. Every core
includes both an optimized 32 KB L1 cache and a private 512 KB
Unified (Instruction/Data) L2 cache.
B. Core Complex (CCX) and Core Complex Die (CCD)
Up to eight Zen 3 compute units share an L3 cache of up to
32 MB in a grouping referred to as a Core Complex (CCX).
Enabling SMT on a core means that a CCX may support up to
16 concurrent hardware threads, up to 4 MB of L2 cache, and
up to 32 MB L3 cache, which is shareable across all cores within the CCX. AMD EPYC 7003 Series
Processors contain a single CCX called a Core Complex Die (CCD) on a single die. See Figure 2.
C. I/O Die (Infinity Fabric™ technology)
Each CCD connects to memory, I/O, and each other through
the I/O Die (IOD) via a dedicated high-speed or Global
Memory Interconnect (GMI) link. The IOD also contains
memory channels, PCIe Gen4 lanes, and Infinity Fabric
Figure 2: AMD EPYC 7003 I/O Die
Figure 1 - AMD EPYC 7003 processor