virtualized environments. SEV-SNP expands on the SEV features found in earlier EPYC processors by
adding memory integrity capabilities that can help prevent hypervisor-based attacks by creating an
isolated execution environment for each virtual machine.
AMD EPYC 7003 Series Processors Deliver Flexibility, Performance, and Security Features
Overview
AMD EPYC 7003 Series Processors retain the proven Multi-Chip Module (MCM) Chiplet Architecture of
prior successful AMD EPYC server-class processors with further improvements and upgraded “Zen 3”
compute cores.
A. “Zen 3” Core Microarchitectural Overview
AMD EPYC 7003 Series Processors are built with new 7nm “Zen
3” compute cores that provide an Instructions per Cycle (IPC)
uplift over previous “Zen” generations. Each core supports
Simultaneous Multi-threading (SMT) that allows running two
simultaneous threads per core when enabled. Every core
includes both an optimized 32 KB L1 cache and a private 512 KB
Unified (Instruction/Data) L2 cache.
B. Core Complex (CCX) and Core Complex Die (CCD)
Up to eight “Zen 3” compute units share an L3 cache of up to
32 MB in a grouping referred to as a Core Complex (CCX).
Enabling SMT on a core means that a CCX may support up to
16 concurrent hardware threads, up to 4 MB of L2 cache, and
up to 32 MB L3 cache, which is shareable across all cores within the CCX. AMD EPYC 7003 Series
Processors contain a single CCX called a Core Complex Die (CCD) on a single die. See Figure 2.
C. I/O Die (Infinity Fabric™ technology)
Each CCD connects to memory, I/O, and each other through
the I/O Die (IOD) via a dedicated high-speed or Global
Memory Interconnect (GMI) link. The IOD also contains
memory channels, PCIe Gen4 lanes, and Infinity Fabric™