ATtiny417/817

ATtiny417/817 Silicon Errata and Data Sheet Clarification

The ATtiny417/817 devices you have received conform functionally to the current device data sheet (DS40001901),

except for the anomalies described in this document. The erratas described in this document will likely be addressed

in future revisions of the ATtiny417/817 devices.

Note:

• This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current.

• Refer to the Device/Revision ID section in the current device data sheet (DS40001901) for more detailed

information on Device Identification and Revision IDs for your specific device, or contact your local Microchip

sales office for assistance.

Errata

DS40002117B-page 1

1. Silicon Issue Summary

Legend

- Erratum is not applicable.

X Erratum is applicable.

* This silicon revision was never released to production.

Peripheral Short Description Valid for Silicon Revision

Rev. A Rev. B

2.2.1 Coupling Through AC Pins X X

2.2.2 AC Interrupt Flag Not Set Unless Interrupt is Enabled X X

2.2.3 False Triggers May Occur Under Certain Conditions X X

2.2.4 False Triggering When Sweeping Negative Input of the AC When

the Low Power Mode is Disabled

X X

ADC

2.3.1 ADC Functionality Cannot be Ensured with CLKADC Above 1.5

MHz and a Setting of 25% Duty Cycle

X X

2.3.2 ADC Performance Degrades with CLKADC Above 1.5 MHz and

VDD < 2.7V

X X

2.3.3 Pending Event Stuck When Disabling the ADC X X

2.3.4 ADC Interrupt Flags Cleared When Reading RESH X X

2.3.5 Changing ADC Control Bits During Free-Running Mode not Working X X

2.3.6 One Extra Measurement Performed After Disabling ADC Free-

Running Mode

X X

2.3.7 ADC Wake-Up with WCOMP X X

CCL

2.4.1 Connecting LUTs in Linked Mode Require OUTEN Set to ‘1’ X X

2.4.2 D-latch is Not Functional X X

RTC

2.5.1 Any Write to the RTC.CTRLA Register Resets the RTC and PIT

Prescaler

X X

2.5.2 Disabling the RTC Stops the PIT X X

TCB

2.6.1 Minimum Event Duration Must Exceed the Selected Clock Period X X

2.6.2 The TCB Interrupt Flag is Cleared When Reading CCMPH X X

2.6.3 TCB Input Capture Frequency and Pulse-Width Measurement Mode

Not Working with Prescaled Clock

X X

2.6.4 The TCA Restart Command Does Not Force a Restart of TCB X X

TCD

2.7.1 TCD Auto-Update Not Working X X

2.7.2 TCD Event Output Lines May Give False Events X X

TWI

2.8.1 TIMEOUT Bits in the TWI.MCTRLB Register are Not Accessible X X

2.8.2 TWI Smart Mode Gives Extra Clock Pulse X X

2.8.3 TWI Master Mode Wrongly Detects the Start Bit as a Stop Bit X X

2.8.4 The TWI Master Enable Quick Command is Not Accessible X X

ATtiny417/817

Silicon Issue Summary

Errata

DS40002117B-page 2