ABOUT ADSP-CM402F/CM403F/CM407F/CM408F/CM409F SILICON ANOMALIES

These anomalies represent the currently known differences between revisions of the ADSP-CM402F/CM403F/CM407F/CM408F/CM409F

product(s) and the functionality specified in the ADSP-CM402F/CM403F/CM407F/CM408F/CM409F data sheet(s) and the Hardware

Reference book(s).

PRODUCT REVISIONS

A product revision letter with the form "-x" is branded on all parts. The implementation field bits <31:28> of the JTAG0_IDCODE register

can be used to differentiate the revisions as shown below.

Product REVISION JTAG0_IDCODE<31:28> Analog Front End (AFE) ID*

H 0x2 0x3

*= The adi_adcc_ReadAFEID API software driver can be used to read Analog Front End ID

ANOMALY LIST REVISION HISTORY

The following revision history lists the anomaly list revisions and major changes for each anomaly list revision.

Date Anomaly List Revision Data Sheet Revision Additions and Changes

08/03/2020 I Rev A Modified Anomaly: 17000089

02/26/2020 H Rev A Added Anomaly: 17000089

12/08/2015 G Rev A Added Anomalies: 17000033, 17000051, 17000052, 17000053,

17000054, 17000056

05/19/2015 F PrG Added Anomalies: 17000029, 17000030, 17000031

04/02/2015 E PrG Added Anomalies: 17000027, 17000028

12/15/2014 D PrF Added Anomalies: 17000026

10/7/2014 C PrF Added Anomalies: 17000025

08/26/2014 B PrF Added Anomalies: 17000004, 17000013, 17000015, 17000019,

17000020, 17000021, 17000022, 17000023, 17000024

09/17/2013 A PrE Initial Version

ADSP-CM402F/CM403F/CM407F/CM408F/CM409F

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Silicon Anomaly List

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SUMMARY OF SILICON ANOMALIES

The following table provides a summary of ADSP-CM402F/CM403F/CM407F/CM408F/CM409F anomalies and the applicable product

revision(s) for each anomaly.

No. ID Description Rev

1 17000013 Setup Time of USB0_ID Signal Deviates from All Other System Input Specifications x

2 17000015 ADCC Collision Status Is Indicated for Only One ADC in Simultaneous Sampling Mode x

3 17000021 SPI Slave Enable Output Not Driven Properly When Controlled by Software x

4 17000025 TIMER_DATA_ILAT Bit Is Set in EXTCLK Mode When TIMER_TMRn_CNT Rolls Over to 1 x

5 17000027 RCU0_SRRQSTAT Register Is Not Affected by TRU's System Reset Request x

6 17000028 ECC Logic in Analog Front End Does Not Trigger a Fault x

7 17000029 SPI Data Pins Are Internally Pulled High in Open-Drain Mode x

8 17000031 SPORT May Drive Data Pins During Inactive Channels in Multi-Channel Mode x

9 17000033 SMC Byte Enable Signals Tri-State during Read Operations x

10 17000056 Slave Boot Modes Do Not Support Flash Bulk Erase Requests x

11 17000089 Internal Voltage Regulator Does Not Regulate VDD_INT to Specified Voltage x

Key: x = anomaly exists in revision

. = Not applicable

ADSP-CM402F/CM403F/CM407F/CM408F/CM409F

NR004309I | Page 2 of 7 | August 2020

Silicon Anomaly List