July. 12, 2021 © 2019 Transphorm Inc. Subject to change without notice.
tp65h015G5ws.1v0 1
TP65H015G5WS
650V SuperGaN™ FET in TO-247 (source tab)
Features
• JEDEC qualified GaN technology
• Dynamic R
DS(on)eff
production tested
• Robust design, defined by
— Intrinsic lifetime tests
— Wide gate safety margin
— Transient over-voltage capability
• Very low Q
RR
• Reduced crossover loss
Benefits
• Enables AC-DC bridgeless totem-pole PFC designs
— Increased power density
— Reduced system size and weight
— Overall lower system cost
• Achieves increased efficiency in both hard- and soft-
switched circuits
• Easy to drive with commonly-used gate drivers
• GSD pin layout improves high speed design
Applications
• Datacom
• Broad industrial
• PV inverter
• Servo motor
Description
The TP65H015G5WS 650V, 15 mΩ gallium nitride GaN FET
is a normally-off device using Transphorm’s Gen V platform.
It combines a state-of-the-art high voltage GaN HEMT with a
low voltage silicon MOSFET to offer superior reliability and
performance.
The Gen V SuperGaN™ platform uses advanced epi and
patented design technologies to simplify manufacturability
while improving efficiency over silicon via lower gate charge,
output capacitance, crossover loss, and reverse recovery
charge.
Related Literature
• AN0009: Recommended External Circuitry for GaN FETs
• AN0003: Printed Circuit Board Layout and Probing
• AN0010: Paralleling GaN FETs
S
G
D
S
TP65H015G5WS
TO-247
(top view)
Ordering Information
Part Number Package
Package
Configuration
TP65H015G5WS 3 lead TO-247 Source
Key Specifications
V
DSS
(V) 650
V
(TR)DSS
(V) 725
R
DS(on)eff
(mΩ) max* 18
Q
RR
(nC) typ 430
Q
G
(nC) typ 74
* Dynamic on-resistance; see Figures 18 and 19
Cascode Device Structure Cascode Schematic Symbol
Feb. 24, 2021 transphormusa.com
tp65h015G5ws.1v0 2
TP65H015G5WS
Thermal Resistance
Symbol Parameter Typical Unit
R
ΘJC
Junction-to-case 0.47 °C/W
R
ΘJA
Junction-to-ambient 40 °C/W
Absolute Maximum Ratings (T
c
=25°C unless otherwise stated.)
Symbol Parameter Limit Value Unit
V
DSS
Drain to source voltage (T
J
= -55°C to 150°C) 650
V
V
(TR)DSS
Transient drain to source voltage
a
725
V
GSS
Gate to source voltage ±20
P
D
Maximum power dissipation @T
C
=25°C 266 W
I
D
Continuous drain current @T
C
=25°C
b
93 A
Continuous drain current @T
C
=100°C
b
59 A
I
DM
Pulsed drain current (pulse width: 10µs) 600 A
T
C
Operating temperature
Case -55 to +150 °C
T
J
Junction -55 to +150 °C
T
S
Storage temperature -55 to +150 °C
T
SOLD
Soldering peak temperature
c
260 °C
Notes:
a. In off-state, spike duty cycle D<0.01, spike duration <1µs
b. For increased stability at high current operation, see Circuit Implementation on page 3
c. For 10 sec., 1.6mm from the case