AVR128DB28/32/48/64
AVR128DB28/32/48/64 Silicon Errata and Data Sheet
Clarifications
The AVR128DB28/32/48/64 devices you have received conform functionally to the current device data sheet
( www.microchip.com/DS40002247 ), except for the anomalies described in this document. The errata described in
this document will likely be addressed in future revisions of the AVR128DB28/32/48/64 devices.
Notes: 
This document summarizes all the silicon errata issues from all revisions of silicon, previous as well as current
Refer to the Device/Revision ID section in the current device data sheet ( www.microchip.com/DS40002247 ) for
more detailed information on Device Identification and Revision IDs for your specific device, or contact your local
Microchip sales office for assistance
© 2020 Microchip Technology Inc.
Errata Datasheet
DS80000915B-page 1
1. Silicon Issue Summary
Legend
- Erratum is not applicable.
X Erratum is applicable.
Peripheral Short Description Valid for Silicon Revision
Rev. A4
(1)
Rev. A5
Device 2.2.1 Some Reserved Fuse Bits are ‘1’ X -
2.2.2 Increased Current Consumption May Occur When VDD Drops X X
ADC 2.3.1 Increased Offset in Single-Ended Mode X -
CCL 2.4.1 The CCL Must be Disabled to Change the Configuration of a Single
LUT
X X
2.4.2 The LINK Input Source Selection for LUT3 is Not Functional on 28-
and 32-Pin Devices
X -
CLKCTRL 2.5.1 External Clock/Crystal Status Bit is Not Set When the External
Clock Source is Ready
X -
2.5.2 RUNSTDBY is Not Functional When Using External Clock Sources X -
2.5.3 The PLL Will Not Run when Using XOSCHF with an External
Crystal
X X
OPAMP 2.6.1 OPAMP Consume More Power Than Expected X -
2.6.2 The Input Range Select is Read-Only X -
PORT 2.7.1 PD0 Input Buffer is Floating X X
RSTCTRL 2.8.1 BOD Registers Not Reset When UPDI is Enabled X -
TCB 2.9.1 CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit
PWM Mode
X X
TCD 2.10.1 Asynchronous Input Events Not Working When TCD Counter
Prescaler is Used
X X
2.10.2 CMPAEN Controls All WOx For Alternative Pin Functions X X
TWI 2.11.1 The Output Pin Override Does Not Function as Expected X X
USART 2.12.1 Open-Drain Mode Does Not Work When TXD is Configured as
Output
X X
2.12.2 Start-of-Frame Detection Can Unintentionally be Enabled in Active
Mode when RXCIF is ‘0’
X X
ZCD 2.13.1 All ZCD Output Selection Bits are Tied to the ZCD0 Bit X -
Note: 
1. This revision is the initial release of the silicon.
AVR128DB28/32/48/64
Silicon Issue Summary
© 2020 Microchip Technology Inc.
Errata Datasheet
DS80000915B-page 2