ATtiny1614/1616/1617
ATtiny1614/1616/1617 Silicon Errata and Data Sheet
Clarification
The ATtiny1614/1616/1617 devices you have received conform functionally to the current device data sheet
(www.microchip.com/DS40002204), except for the anomalies described in this document. The errata described in this
document will likely be addressed in future revisions of the ATtiny1614/1616/1617 devices.
Notes:
• This document summarizes all the silicon errata issues from all revisions of silicon, previous as well as current
• Refer to the Device/Revision ID section in the current device data sheet (www.microchip.com/DS40002204) for
more detailed information on Device Identification and Revision IDs for your specific device, or contact your local
Microchip sales office for assistance
© 2020 Microchip Technology Inc.
Errata
DS80000886B-page 1
1. Silicon Issue Summary
Legend
- Erratum is not applicable.
X Erratum is applicable.
Peripheral Short Description Valid for Silicon Revision
Rev. A Rev. B
Device
2.2.1 Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents
Automatic Loading of Calibration Values
X X
AC
2.3.1 AC Interrupt Flag Not Set Unless Interrupt is Enabled X X
2.3.2 False Triggers May Occur Under Certain Conditions X -
2.3.3 False Triggering When Sweeping Negative Input of the AC When
the Low-Power Mode is Disabled
X -
ADC
2.4.1 SAMPDLY and ASDV Does Not Work Together With SAMPLEN X X
2.4.2 Pending Event Stuck When Disabling the ADC X X
2.4.3 ADC Functionality Cannot be Ensured with CLKADC Above 1.5
MHz and a Setting of 25% Duty Cycle
X X
2.4.4 ADC Performance Degrades with CLKADC Above 1.5 MHz and
VDD < 2.7V
X X
2.4.5 ADC Interrupt Flags Cleared When Reading RESH X X
2.4.6 Changing ADC Control Bits During Free-Running Mode not Working X X
2.4.7 One Extra Measurement Performed After Disabling ADC Free-
Running Mode
X X
2.4.8 ADC Wake-Up with WCMP X X
CCL
2.5.1 Connecting LUTs in Linked Mode Requires OUTEN Set to ‘1’ X X
2.5.2 D-latch is Not Functional X X
2.5.3 The CCL Must be Disabled to Change the Configuration of a Single
LUT
X X
RTC
2.6.1 Any Write to the RTC.CTRLA Register Resets the RTC and PIT
Prescaler
X X
2.6.2 Disabling the RTC Stops the PIT X X
TCA 2.7.1 Restart Will Reset Counter Direction in NORMAL and FRQ Mode X X
TCB
2.8.1 Minimum Event Duration Must Exceed the Selected Clock Period X X
2.8.2 The TCB Interrupt Flag is Cleared When Reading CCMPH X X
2.8.3 TCB Input Capture Frequency and Pulse-Width Measurement Mode
Not Working with Prescaled Clock
X X
2.8.4 The TCA Restart Command Does Not Force a Restart of TCB X X
2.8.5 CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit
PWM Mode
X X
ATtiny1614/1616/1617
Silicon Issue Summary
© 2020 Microchip Technology Inc.
Errata
DS80000886B-page 2