ATtiny417/814/816/817
ATtiny417/814/816/817 Silicon Errata and Data Sheet
Clarification
The ATtiny417/814/816/817 devices you have received conform functionally to the current device data sheet
(www.microchip.com/DS40002288), except for the anomalies described in this document. The errata described in this
document will likely be addressed in future revisions of the ATtiny417/814/816/817 devices.
Notes:
• This document summarizes all the silicon errata issues from all revisions of silicon, previous as well as current
• Refer to the Device/Revision ID section in the current device data sheet (www.microchip.com/DS40002288) for
more detailed information on Device Identification and Revision IDs for your specific device, or contact your local
Microchip sales office for assistance
© 2020 Microchip Technology Inc.
Errata
DS80000934A-page 1
1. Silicon Issue Summary
Legend
- Erratum is not applicable.
X Erratum is applicable.
Peripheral Short Description Valid for Silicon
Revision
Rev. B
(1)
Device
2.2.1 Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic
Loading of Calibration Values
X
AC
2.3.1 Coupling Through AC Pins X
2.3.2 AC Interrupt Flag Not Set Unless Interrupt is Enabled X
2.3.3 False Triggers May Occur Under Certain Conditions X
2.3.4 False Triggering When Sweeping Negative Input of the AC When the Low-
Power Mode is Disabled
X
ADC
2.4.1 One Extra Measurement Performed After Disabling ADC Free-Running
Mode
X
2.4.2 Changing ADC Control Bits During Free-Running Mode not Working X
2.4.3 ADC Wake-Up with WCMP X
2.4.4 ADC Functionality Cannot be Ensured with CLKADC Above 1.5 MHz and a
Setting of 25% Duty Cycle
X
2.4.5 ADC Performance Degrades with CLKADC Above 1.5 MHz and VDD <
2.7V
X
2.4.6 Pending Event Stuck When Disabling the ADC X
2.4.7 ADC Interrupt Flags Cleared When Reading RESH X
CCL
2.5.1 Connecting LUTs in Linked Mode Requires OUTEN Set to ‘1’ X
2.5.2 D-latch is Not Functional X
2.5.3 The CCL Must be Disabled to Change the Configuration of a Single LUT X
RTC
2.6.1 Any Write to the RTC.CTRLA Register Resets the RTC and PIT Prescaler X
2.6.2 Disabling the RTC Stops the PIT X
TCA 2.7.1 Restart Will Reset Counter Direction in NORMAL and FRQ Mode X
TCB
2.8.1 Minimum Event Duration Must Exceed the Selected Clock Period X
2.8.2 The TCB Interrupt Flag is Cleared When Reading CCMPH X
2.8.3 TCB Input Capture Frequency and Pulse-Width Measurement Mode Not
Working with Prescaled Clock
X
2.8.4 The TCA Restart Command Does Not Force a Restart of TCB X
2.8.5 CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit PWM Mode X
ATtiny417/814/816/817
Silicon Issue Summary
© 2020 Microchip Technology Inc.
Errata
DS80000934A-page 2