PUB26013, Rev. 6

MCO-0000225

Product Information

Allegro Package Designations

This document provides reference information as an

aid to differentiating the device package types used by

Allegro

™

MicroSystems. It provides cross-references

to the package designation, an Allegro code that is

integrated into the device part number:

• alphabetical listing of Allegro package

designators, with differentiating specifications

and reference illustrations

• alphabetical listing of common or obsolete

package designators, cross-referenced to Allegro

designators

• key to interpreting Allegro part numbers for

package designators

• key to interpreting Allegro terms for lead forms

The package designator is used to differentiate the

external physical characteristics of the packages for

ordering purposes.

To use this document, in the Allegro Package Code

column, locate the package designator for the device.

Alternatively, use the drawings to identify a package,

or the cross-reference to common terms.

A few package types have leadform options. These

options are indicted by the instruction codes, shown in

parentheses in the Package Designation column. Lead-

form options are shown in separate rows. Leadform

options are not always available for every device type.

The options available for any specific device are

substantially determined by the package designation

for that device. Not all options are available for any

particular package designation or device type, and

provision of certain configurations may be subject

to minimum volume or ncnr (noncancellation, non-

return) limitations.

For clarity and differentiation, the drawings are

schematic and not to scale, however, a representative

footprint is provided at approximately actual size of

the package body when mounted on a pcb. The draw-

ings do not represent all possible configurations of

that device, or any particular device, and may have

features that vary according to supplier preference

within specifications, such as pin 1 index marks.

Exposed thermal pads may have several alternative

layouts for any particular package designation.

When applicable, references to industry-standard

type conventions, such as jedec package registrations,

are provided. These references are for informational

purposes only, and do not necessarily indicate that the

device indicated conforms fully with those standards

in all respects.

NOTE: For information on packages and leadform

configurations offered for individual devices, refer to

the datasheet for the device.

INTRODUCTION

September 19, 2019

PUB26013, Rev. 6

MCO-0000225

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Package

Desig-

nator

Package Type

(Common Package Designator)

JEDEC

Package

Outline

Quantity

Terminals

Pictorial View/

Representative Footprint

Plastic dual in-line (DIP/PDIP/DIL/PDIL);

Through-hole pin, 300 mil row spacing;

"BB" half-lead end pins. OBSOLETE

MS-001AA

MS-001AC

MS-001AD

MS-001AF

Plastic dual in-line (DIP/PDIP/DIL/PDIL);

Through-hole pin, 300 mil row spacing (width measured

at shoulders of leads); End pins are half-leads

– 16

Plastic dual in-line (DIP/PDIP/DIL/PDIL);

Through-hole pin, 400 mil row spacing; OBSOLETE

MS-010AA 22

Plastic dual in-line (DIP/PDIP/DIL/PDIL);

Through-hole pin, 600 mil row spacing; OBSOLETE

MS-011AB 28

Semi-tab plastic dual in-line (DIP/PDIP/DIL/PDIL)

with internally fused leads, both sides;

Through-hole pin, 300 mil row spacing;

"BB" half-lead end pins; NND

MS-001BB

MS-001AF

CA/CB

(PFF)

Plastic case with internally fused primary conductor leads

for sensed current;

Through-hole pin

– 5

CA/CB

(PSF)

Plastic case with internally fused primary conductor leads

for sensed current;

Through-hole/weld pin

– 5

CA/CB

(PSS)

Plastic case with internally fused primary conductor leads

for sensed current;

Through-hole/weld pin

– 5

CG Bare die with solder bumps (WLCSP)

– Various

PACKAGE DESIGNATORS