RTG4
™
FPGA
Introduction
RTG4 FPGAs integrate Microchip's fourth-generation flash-based FPGA fabric and high-performance interfaces such
as serialization/deserialization (SerDes) on a single-chip while maintaining the resistance to radiation-induced
configuration upsets in the harshest radiation environments, such as space flight (LEO, MEO, GEO, HEO, deep
space), high altitude aviation, medical electronics, and nuclear power plant control. The RTG4 family offers up to
151,824 registers, which are hardened by design against radiation-induced single-event upsets (SEUs). Each RTG4
logic element includes a 4-input LookUp Table (LUT4) with fast carry chains providing high-performance FPGA fabric
up to 300 MHz.
Multiple embedded memory options and embedded multiply-accumulate blocks perform Digital Signal Processing
(DSP) up to 300 MHz. A high-speed serial interface provides 3.125 Gbps native SerDes communication, while double
data rate DDR2/DDR3/LPDDR memory controllers provide high-speed memory interfaces.
Device Status
The following table lists the development status of the RTG4 FPGA devices.
Table 1. Device Status
Device Package Status
RT4G150 CG/LG/CB1657 Production
RT4G150 CQ352 Production
RT4G150 FCG/FC1657 Advance
Note: For CQ352 package qualification, Group D5, which includes the salt atmosphere test, is only done with the
device's lid face down.
Product Briefs and Pin Descriptions
The following list shows the product brief and pin descriptions of the RTG4 FPGAs that are published separately.
• RTG4 FPGAs Product Brief
• RTG4 FPGA Pin Descriptions
• RTG4 Plastic Product Brief
• RTG4 Plastic Pin Assignment
© 2020 Microchip Technology Inc.
Datasheet
DS00003669A-page 1
Table of Contents
Introduction.....................................................................................................................................................1
1. Device Status............................................................................................................................... 1
2. Product Briefs and Pin Descriptions.............................................................................................1
1. General Specifications............................................................................................................................ 4
1.1. Operating Conditions....................................................................................................................4
2. Power Consumption..............................................................................................................................10
2.1. Quiescent Supply Current.......................................................................................................... 10
3. Junction Temperature and Derating Factors......................................................................................... 12
4. User I/O Characteristics........................................................................................................................ 13
4.1. Input Buffer.................................................................................................................................13
4.2. Output Buffer and AC Loading................................................................................................... 14
4.3. Tristate Buffer and AC Loading.................................................................................................. 15
4.4. I/O Speeds................................................................................................................................. 16
4.5. Detailed I/O Characteristics........................................................................................................18
4.6. Single-Ended I/O Standards.......................................................................................................19
4.7. Memory Interface and Voltage Reference I/O Standards...........................................................32
4.8. Differential I/O Standards........................................................................................................... 55
4.9. I/O Register Specifications......................................................................................................... 69
4.10. DDR Module Specification......................................................................................................... 74
5. Logic Element Specifications................................................................................................................ 80
5.1. LUT4...........................................................................................................................................80
5.2. Sequential Module......................................................................................................................81
6. Global Resource Characteristics...........................................................................................................84
7. FPGA Fabric SRAM.............................................................................................................................. 85
7.1. FPGA Fabric Large SRAM (LSRAM)......................................................................................... 85
7.2. FPGA Fabric Micro SRAM (µSRAM)..........................................................................................89
8. FPGA Fabric Micro PROM (μPROM)....................................................................................................99
9. JTAG................................................................................................................................................... 100
9.1. Live Probe................................................................................................................................ 100
10. Power-up to Functional Times.............................................................................................................101
11. Device Reset DEVRST_N...................................................................................................................103
12. On-Chip Oscillator...............................................................................................................................105
13. Clock Conditioning Circuits (CCC)...................................................................................................... 106
14. System Controller SPI Characteristics................................................................................................ 110
15. Mathblock Timing Characteristics........................................................................................................111
© 2020 Microchip Technology Inc.
Datasheet
DS00003669A-page 2