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PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL
www.diodes.com December 2019
Diodes Incorporated
PI3EQX1002B1
Document Number DS40592 Rev 3-2
Equalizer
Channel A
Channel B
SW/FG/EQ
Control Logic
Input Level detect
to control logic
Input Level detect
to control logic
Power Management
+
–
TXAP
TXAN
RXBP
RXBN
+
–
+
+
–
–
+
–
EQA
Output buer
SWB
EQA/B
SWA/B
FGA/B
Channel A
Channel B
RXAP
RXAN
TXBP
TXBN
EN
+
–
Flat gain FGA
Output buer
SWA
+
–
Flat gain FGB
Equalizer
EQB
+
–
RXDET_EN
Features
5 & 10Gbps serial link with linear equalizer.
USB3.1 and USB3.0 Compatible
Full Compliancy to USB3.1 Super Speed Standard
Two 10Gbps dierential signal pairs
Pin Adjustable Receiver Equalization
Pin Adjustable output linear swing
Pin Adjustable Flat Gain
100Ω Dierential CML I/O’s
Automatic Receiver Detect
Auto "Slumber" mode for adaptive power management
Single Supply Voltage: 3.3V
Industrial Temperature Range: -40
o
C to 85
o
C
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
For automotive applications requiring specic change control
(i.e. parts qualied to AEC-Q100/101/200, PPAP capable,
and manufactured in IATF 16949 certied facilities), please
contact us or your local Diodes representative.
https://www.diodes.com/quality/product-denitions/
Packaging:
30-pin, TQFN 2.5x4.5 mm (ZL30)
Description
e PI3EQX1002B1 is a low power, high performance 10.0 Gbps
1-Port USB 3.1 linear ReDriver™ designed specically for the USB
3.1 protocol.
e device provides programmable equalization, linear swing
and at gain to optimize performance over a variety of physical
mediums by reducing Inter-Symbol Interference. PI3EQX1002B1
supports two 100Ω Dierential CML data I/O’s between the
Protocol ASIC to a switch fabric, over cable, or to extend the
signals across other distant data pathways on the user’s platform.
e integrated equalization circuitry provides exibility with
signal integrity of the signal before the ReDriver. Each channel
operates fully independently. e channels’ input signal level de-
termines whether the output is active.
e PI3EQX1002B1 also includes an automatic receiver detect
function. e receiver detection loop will be active again if the
corresponding channel’s signal detector is idle for longer than
7.3mS. e channel will then move to Unplug Mode if load not
detected, or it will return to Low Power Mode (Slumber Mode)
due to inactivity.
Block Diagram
Figure 1
USB 3.0 Cable
Smart Phone
External Storage
Device
PC Monitor
Tablet PC
Pericom
USB 3.1
ReDriver
Notebook
Pericom
USB 3.1
ReDriver
PI3EQX1002B1
1-Port USB3.1 Gen-2 ReDriver
A product Line of
Diodes Incorporated
b
P
Lead-free Green
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s denitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are dened as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm
antimony compounds.
ReDriver is a trademark of Diodes Incorporated.
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PI3EQX1002B1
A product Line of
Diodes Incorporated
www.diodes.com December 2019
Diodes Incorporated
PI3EQX1002B1
Document Number DS40592 Rev 3-2
Pin Description
Pin # Pin Name Type Description
1, 10, 16, 25 VDD Power 3.3V power supply, +/-0.3V
27,
14
FGA
FGB
Input
e DC at gain selection. 4-level input pins. With internal 100KΩ pull-up resistor
and 200kΩ pull-down resistor.
29,
12
SWA
SWB
Input
The Output Swing selection. 4-level input pins. With internal 100KΩ pull-up resis-
tor and 200kΩ pull-down resistor.
26,
15
EQA
EQB
Input
e EQ selection. 4-level input pins. With internal 100KΩ pull-up resistor and
200kΩ pull-down resistor.
2, 3
17, 18
AIP, AIN
BIP, BIN
Input
CML input terminals. With selectable input termination between 50Ω to VDD,
67kΩ to VbiasRx or 67kΩ to GND.
24, 23
9, 8
AOP, AON
BOP, BON
Output
CML output terminals. With selectable output termination between 50Ω to VDD,
6kΩ to VDD, 6kΩ to VbiasTx or Hi-Z
11 RXDET_EN Input
Receiver detection Enable pin. With internal 300kΩ pull-up resistor.
“High” – Receiver detection is enabled.
“Low” – Receiver detection is disabled.
30 EN Input
Channel Enable. With internal 300kΩ pull-up resistor.
“High” – Channel is in normal operation.
“Low” – Channel is in power down mode.
4, 5, 6, 7, 13, 19,
20, 21, 22, 28,
Center Pad
GND GND Supply Ground
Pin Diagram (30-pin, TQFN 2.5x4.5mm) ZL30
RXDET_EN
SWB
AIP
VDD
AIN
1
2
3
4
5
6
10
9
8
7
1211
16
1514
17
13
23
24
20
21
22
18
19
25
2627282930
GND
GND
GND
BON
GND
BOP
VDD
GND
FGB
EQB
AOP
VDD
AON
GND
GND
GND
BIN
GND
BIP
VDD
EN
SWA
GND
FGA
EQA
GND