Revision History
The following table shows the revision history for this document.
Section
Revision Summary
08/18/2021 Version 2021.1
Power Distribution System Added XPE landing page and changed XADC to Sysmon.
Power Rail Consolidation Impacting Power Added tip about power rail constraints.
Clocking Recommendations for Platforms and Dynamic
Function eXchange
Added new section.
Chapter 4: Design Constraints Added note about traditional and platform-based design
flows.
Constraining Input and Output Ports Added note about I/O logic.
Defining Power and Thermal Constraints Added new section.
Floorplanning Constraints for Dynamic Function eXchange Added new section.
Chapter 6: Design Closure Updated design closure description.
Timing Closure Added timing result note.
Checking for Valid Constraints Added baselining design to note.
Checking for Positive Timing Slacks Updated timing score description.
Checking That Your Design is Properly Constrained Added timing constraint note.
Fixing Issues Flagged by report_methodology Added methodology violation note and link to methodology
blog.
Methodology DRCs with Impact on Timing Closure Added link to Vivado Design Suite User Guide: Design Analysis
and Closure Techniques (UG906).
Assessing the Maximum Frequency of the Design Updated WNS description.
Clock Skew and Uncertainty Added clock uncertainty description and related links.
Using Intelligent Design Runs Added new section.
Power Closure Added power optimization capabilities description.
Power Timing Slack Added new section.
Revision History
UG949 (v2021.1) August 18, 2021 www.xilinx.com
UltraFast Design Methodology Guide 2