1 Introduction
The MPC5643L microcontroller is based on the Power
Architecture® and targets electric power steering, chassis, and
safety applications that require a high safety integrity level.
The host processor core of the device is a member of the
e200z4 Power Architecture compatible core family.
For more details, see MPC5643LRM: MPC5643L Reference
Manual and MPC5643L Data Sheet, available on
freescale.com
2 Power supplies
The on-chip voltage regulator module provides the following
features:
Single high-supply requires nominal 3.3 V.
An external ballast transistor is used to reduce
dissipation capacity at high temperature but an
embedded transistor can be used if power dissipation is
maintained within package dissipation capacity (lower
frequency of operation).
All I/Os are at same voltage as external supply (3.3 V
nominal).
The core voltage supplies are not under user control.
The core supplies are generated by the on-chip voltage
regulator.
Freescale Semiconductor
Document Number: AN4623
Application Note
Rev 1, 10/2013
MPC5643L Hardware
Requirements
by: Anita Maliverney, Masato Oshima, and Eugenio Fortanely
© 2012–2013 Freescale Semiconductor, Inc.
Contents
1 Introduction................................................................1
2 Power supplies...........................................................1
3 Voltage regulator operating
configurations...........................................................4
4 Recommendations on external
components................................................................6
5 /RESET pin and power-up......................................18
6 External oscillator (XOSC).....................................19
7 Unused system pin termination...............................19
8 References...............................................................20
9 Revision history......................................................20
For details on the power supply pin numbers and recommended operating voltage conditions, see MPC5643L Data Sheet,
available on freescale.com.
2.1 Power management unit (PMU) overview
The PMU generates the 1.2 V core logic supply from a 3.3 V (nominal) input supply by means of a linear voltage regulator
driving an external NPN bipolar transistor (emitter-follower configuration) or an internal pMOSFET.
The PMU always starts up using the internal ballast transistor. It then executes an automatic procedure that detects (during
the system reset phase) whether an external ballast transistor is operational. If a functional external ballast transistor is
detected, the power is supplied to the system through the external transistor only. The information whether the internal or the
external ballast transistor is used is available via Configuration Status Bits of the PMUCTRL status register
(PMUCTRL_STATUS[CTB]).
The operating voltages are monitored by a set of on-chip supervisory circuits to ensure that this device works within the
correct voltage range. These circuits are:
Low-Voltage Detector (LVD)
High-Voltage Detector (HVD)
Comparators
Main digital low- and high-voltage monitoring circuits are tested by integrated self-test circuitry. The Voltage Regulator, IO
and flash-dedicated low-voltage monitoring circuitries which are called LVD_MAIN1, LVD_MAIN2, and LVD_MAIN3 are
redundant in order to improve the safety coverage. The LVDs and the comparators provide their output signals to the Reset
Generation Module (MC_RGM) and to the Fault Collection and Control Unit (FCCU).
See MPC5643LRM: MPC5643L Reference Manual and MPC5643L Data Sheet, available on freescale.com, for more details
on the PMU Voltage Architecture.
The 3.3 V supply domains are called High-Voltage (HV) domains, while the 1.2 V supply domains are called Low-Voltage
(LV) domains.
Power supplies
MPC5643L Hardware Requirements, Rev 1, 10/2013
2 Freescale Semiconductor, Inc.