Freescale Semiconductor

Document Number: AN4624

Application Note

Rev. 1, 11/2012

Migrating from MPC5643L to

MPC5744P

by: Barbara Johnson

1 Introduction

The MPC5643L 32-bit MCU built on Freescale’s Power

Architecture® technology is the first MCU to achieve ISO

26262 ASIL D functional safety standard certification. It

targets chassis and safety applications that require a high

safety integrity level, such as electric power steering, radar and

electronic stability control. The MPC5744P MCU is the 55 nm

successor to the MPC5643L. The MPC5744P is built around a

safety concept targeting an ISO 26262 ASIL D integrity level

and is part of the SafeAssure program. Its peripheral set is

compatible with the MPC5643L to allow a high degree of re-

use.

This application note provides a summary of the significant

differences between the MPC5643L and MPC5744P devices,

and may be used as a reference for planning a migration to the

MPC5744P. This document covers the architectural

differences between the two devices and highlights the

software and hardware considerations for migrating an

existing MPC5643L-based design to the MPC5744P.

Contents

1 Introduction................................................................1

2 Overview....................................................................2

3 Software considerations............................................4

4 Hardware considerations.........................................11

5 Summary.................................................................14

6 References...............................................................14

7 Revision history......................................................14

2 Overview

The following table summarizes the key feature differences between the MPC5643L and the MPC5744P.

Table 1. Key feature comparison

Feature MPC5643L MPC5744P

Process C90 C55

Core Dual-core e200z4d e200z4201n3 and e200z419 (cut 1)

e200z4251n3 and e200z424 (cut 2)

Lock-step mode Yes Yes (delayed lock-step)

Decoupled parallel mode Yes No

Execution speed Up to 120 MHz Up to 180 MHz

SPE Yes No

LSP No Yes

EFPU Scalar/Vector Scalar

MMU 16 regions No

MPU No 24 regions

Instruction set PCC Book E Yes No

Instruction set VLE Yes Yes

Instruction cache 4 KB 8 KB

Data cache No 4 KB

Data local memory No 64 KB on e200z4201n3 and

e200z4251n3

Core bus AHB 32-bit address, 64-bit data AHB 32-bit address, 64-bit data e2eECC

Internal periphery bus 32-bit address, 32-bit data 32-bit address, 32-bit data

Master x slave ports 4 x 3 in lock-step mode

6 x 3 in decoupled parallel mode

4 x 5

Code/data flash memory 1 MB 2.5 MB

SRAM 128 KB 384 KB

System MPU 16 regions 16 regions

Error correction status mode Yes No

Memory error management unit No Yes

Fault control and collection unit Yes Yes

Interrupt controller

• Priority levels

• SW settable interrupts

• Latency monitor

• 16

• 8

• No

• 32

• 16

• Yes

Periodic interrupt timer 1 module x 4 channels

System timer module 4 channels, replicated module

Table continues on the next page...

Overview

Migrating from MPC5643L to MPC5744P, Rev. 1, 11/2012

2 Freescale Semiconductor, Inc.