1 Introduction
The Successive Approximation Register (SAR) Analog
Digital Converter (ADC) supports run-time hardware built in
self test to verify the operation of the ADC. The ADC self test
feature supports the testing of power supply integrity and
structural component integrity, e.g. capacitors, switches, and
comparators etc. The goal of this feature is to catch and flag
any run-time catastrophic errors leading to ADC functional
failure. The ADC self test includes two different self tests:
• Supply self test: Also referred to as algorithm S it is
used to verify the bandgap, supply (VDD_HV_ADV)
and reference (VDD_HV_ADR) voltages
• Capacitive self test: Also referred to as algorithm C it is
used to to check for opens or shorts in the capacitive
array
This document details supplemental information required to
operate the ADC self test feature. Two use case samples are
also given to help users understand how to program the ADC
self test feature.
2
ADC Self test feature
description
Freescale Semiconductor
Document Number: AN5015
Application Note
Rev 0, 09/2014
MPC574xP ADC Self Test
by: Arun Kumar, Sanjoy Dey, and Jamaal Fraser
© 2014 Freescale Semiconductor, Inc.
Contents
1 Introduction................................................................1
2 ADC Self test feature description............. ................1
3 ADC Self test parameters..........................................3
4 Considerations for software based
comparison................................................................ 4
5 Sample code.............................................................. 6