1 Introduction

i.MX RT1170 covers auto area, so, compared with previous i.MX RT product

like i.MX RT1060, the ECC feature is enhanced a lot. For use case with high

safety level requirement, we need to detect the ECC error when it happens and

informs application system to decide how to process this error.

This document discusses the ECC application on memory, including TCM,

Cache, OCRAM and external memory, and shares some key points and

experience. It does not cover ECC application on peripherals like FlexSPI,

Fuse, OCOTP, CSI, MIPI CSI, MIPI DSI, ENET QOS and FLEX CAN.

For memory ECC application on i.MX RT1170, we need to consider:

• On which memory to apply ECC?

i.MX RT 1170 contains the following memory types:

— TCM

— Cache

— OCRAM

— External memory

• How to inject/capture ECC error?

• Fuse setting and SW configuration related with ECC.

• ROM feature related with ECC.

2 i.MX RT1170 ECC feature list

Table 1 lists i.MXRT1170 ECC features.

Table 1. i.MX RT1170 ECC feature list

Items ECC feature

[CM7] TCM from CM7 FlexRAM

ITCM: 64bit data + 8bit ECC

DTCM: 32bit data + 7bit ECC

[CM7] Cache

I-Cache: 64 bit data + 8 bit ECC

D-Cache: 32 bit data + 7 bit ECC

[CM4] TCM/LMEM

Hsiao odd-weight column criteria ECC code

32 bit data + 7 bit ECC

Table continues on the next page...

Contents

1 Introduction......................................1

2 i.MX RT1170 ECC feature list......... 1

3 Fuse setting and SW configuration

related with ECC feature................. 2

4 Fuse setting implementation by MCU

boot utility tool................................. 3

5 Preloading operation....................... 5

6 ECC error injection..........................6

7 SDK example related with ECC

feature............................................. 6

8 Attentions for i.MX RT1170 ECC

application....................................... 7

9 References......................................7

10 Revision history...............................7

AN13204

i.MX RT1170 ECC Application

Rev. 0 — 03/2021

Application Note

Table 1. i.MX RT1170 ECC feature list (continued)

Items ECC feature

[CM4] Cache Parity check

[CM7/CM4] OCRAM1/OCRAM2

Hsiao Hamming algorithm

64 bit data + 8 bit ECC

[CM7/CM4] OCRAM from CM7 FlexRAM Hsiao Hamming algorithm 64 bit data + 8 bit ECC

[CM7/CM4] OCRAM from CM4 TCM/LMEM

Hsiao odd-weight column criteria ECC code

32 bit data + 7 bit ECC

[CM7/CM4] XECC

Hsiao Hamming algorithm 4 bit data + 4 bit ECC

Extend to be: 32 bit data + 32 bit ECC

3 Fuse setting and SW configuration related with ECC feature

To enable ECC feature, enable related fuse settings and software configurations.

Table 2 lists fuse settings related with ECC.

Table 2. Fuse settings related with ECC

Fuse map Function

0x840[2] MECC, for OCRAM1/OCRAM2

0x840[3] XECC for external memory like SDRAM, SRAM, FlexSPI device.

0x840[15] CM7 Flex RAM ECC(Include CM7 Flex RAM TCM and CM7 Flex RAM OCRAM)

0x950[0] ROM preloading

Table 3 lists the software configurations.

Table 3. SW configurations related with ECC

Items SW config requirement Executed by ROM?

[CM7] TCM from CM7 FlexRAM

SCB->ITCMCR |

= SCB_ITCMCR_RMW_Msk;

SCB->DTCMCR |

= SCB_DTCMCR_RMW_Msk;

FLEXRAM_CTRL |= TCM_ECC_EN_Msk

Yes, if 0x840[15] fused.

[CM7] Cache CACR &= ~ECCEN_Msk No, enabled by default.

[CM4] TCM/LMEM

LMDR0 |= 0xB;

LMDR1 |= 0xB;

(By CM4 only)

Yes, if 0x840[2] fused.

Table continues on the next page...

NXP Semiconductors

Fuse setting and SW configuration related with ECC feature

i.MX RT1170 ECC Application, Rev. 0, 03/2021

Application Note 2 / 8