2020 Microchip Technology Inc. DS00003621A-page 1
INTRODUCTION
The AN3621 LAN9252 to LAN9253 and LAN9254 Migration Guide is intended for customers migrating an existing
LAN9252 board design to either LAN9253 or LAN9254 design. This application note details pin differences between the
LAN9252 and LAN9253 as well as configuration strap differences between the LAN9252 and LAN9253/LAN9254. This
document also contains comparative register data on the devices.
SECTIONS
This document covers the following topics:
• Pin Differences between LAN9252 and LAN9253
• Configuration Strap Differences
• System Control and Status Registers
• Register Differences
• 100BASE-FX Fiber Support
• Moving Design from LAN9252 to LAN9253 and LAN9254
REFERENCES
Refer to the following documents when using this application note. See your Microchip representative for availability:
• LAN9252 2/3-Port EtherCAT
®
Slave Controller with Integrated Ethernet PHYs Data Sheet
• LAN9253 2/3-Port EtherCAT
®
Slave Controller with Integrated Ethernet PHYs Data Sheet
• LAN9254 2/3-Port EtherCAT
®
Slave Controller with Integrated Ethernet PHYs and Demultiplexed HBI/32 DIGIOs
Data Sheet
AN3621
LAN9252 to LAN9253 and LAN9254 Migration Guide
Author: Parthiv Pandya
Microchip Technology Inc.
AN3621
DS00003621A-page 2 2020 Microchip Technology Inc.
PIN DIFFERENCES BETWEEN LAN9252 AND LAN9253
This section provides the pin differences between LAN9252 and LAN9253 devices. Please refer to Table 1.
CONFIGURATION STRAP DIFFERENCES
This section shows the configuration straps for LAN9253. Table 2 outlines the only hardware configuration straps that
are different than LAN9252. A user needs to configure these straps depending on the application.
TABLE 1: PIN COMPARISON BETWEEN LAN9252 AND LAN9253
Pin LAN9252 LAN9253
8 FXLOSEN CLK_25/CLK_25_EN/XTAL_MODE
9 FXSDA/FXLOSA/FXSDENA ERRLED/PME/100FD_B/LEDPOL4
10 FXSDB/FXLOSB/FXSDENB WAIT_ACK/PME/LATCH0//EE_EMUL_SPI3
12 D2/AD2/SOF/SIO2 D2/AD2/SOF/SIO2/EE_EMUL_SPI0
21 D12/AD12/DIGIO6/GPI6/GPO6/MII_TXD1 D12/AD12/DIGIO6/GPI6/GPO6/MII_TXD1/100FD_B
22 D11/AD11/DIGIO5/GPI5/GPO5/MII_TXD0 D11/AD11/DIGIO5/GPI5/GPO5/MII_TXD0/100FD_A
25 A1/ALELO/OE_EXT/MII_CLK25 A1/ALELO/OE_EXT/MII_CLK25//EE_EMUL_SPI2
29 A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/
MII_LINKPOL
A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/
EE_EMUL_ALELO_POL/MII_LINKPOL/LEDPOL2
34 SYNC0/LATCH0 SYNC0/LATCH0/PME
35 D3/AD3/WD_TRIG/SIO3 D3/AD3/WD_TRIG/SIO3/EE_EMUL_SPI1
42 EESDA/TMS EESDA/TMS/EE_EMUL1
43 EESCL/TCK EESCL/TCK/EE_EMUL2
44 IRQ IRQ/LATCH1
45 RUNLED/E2PSIZE RUNLED/STATE_RUNLED/E2PSIZE/EE_EMUL0/LED-
POL3
46 LINKACTLED1/TDI/CHIP_MODE1 LINKACTLED1/TDI/CHIP_MODE1/LEDPOL1
48 LINKACTLED0/TDO/CHIP_MODE0 LINKACTLED0/TDO/CHIP_MODE0/100FD_A/LEDPOL0
Note: LAN9254 is an 80-pin device. Please visit the LAN9254 device data sheet for detailed information on the
device’s pinout.
TABLE 2: DIFFERENCES IN LAN9253 STRAP CONFIGURATION
Pin Strap Name Description
EE_EMUL2,
EE_EMUL1
eeprom_emulation_strap EEPROM Emulation Strap
This configures the ESC to redirect EEPROM reads and
writes to the microcontroller.
EE_EMUL2,
EE_EMUL1,
EE_EMUL0
ee_emul_pdi_sel_strap[2:0] EEPROM Emulation PDI Select Strap
This configures the default PDI selection during EEPROM
Emulation mode.
EE_EMUL_ALEL
O_POL
ee_emul_alelo_pol_strap EEPROM Emulation ALELO Polarity Strap
During EEPROM Emulation mode, if the default PDI selec-
tion is set to HBI Multiplexed 1 Phase, this strap is used to
set bit 2 – HBI ALE polarity of the PDI Configuration regis-
ter (0x0150) – HBI modes until the EEPROM configuration
data have been loaded.