TS32F401CBU7 Datasheet
2020.1.14 1 Ver 1.0
ARM
®
-based 32-bit Cortex
®
-M4F MCU+FPU with 128 KB Flash, sLib,
USB, 2 CANs, 11 timers, 2 ADCs, 11 communication interfaces
Feature
Core: ARM
®
32-bit Cortex
®
-M4F CPU with
FPU
200 MHz maximum frequency, with a
memory protection unit (MPU)
Single-cycle multiplication and hardware
division
Floating point unit (FPU)
DSP instructions
Memories
128 Kbytes of Flash instruction/data
memory
SPIM interface: Extra interfacing up to 16
Mbytes of the external SPI Flash (as
instruction/data memory)
Up to 64 Kbytes of SRAM
sLib: configurable part of main Flash set as
a library area with code executable but
secured, non-readable
Clock, reset, and supply management
2.6 to 3.6 V application supply and I/Os
POR, PDR, and programmable voltage
detector (PVD)
4 to 25 MHz crystal oscillator
Internal 48 MHz factory-trimmed RC
(accuracy 1 % at T
A
= 25 °C, 2.5 % at T
A
= -
40 to +105 °C), with automatic clock
calibration (ACC)
Internal 40 kHz RC oscillator
32 kHz oscillator with calibration
Low power
Sleep, Stop, and Standby modes
V
BAT
supply for RTC and forty-two 16-bit
backup registers
2 x 12-bit, 0.5 μs A/D converters (up to 10
channels)
Conversion range: 0 to 3.6V
Double sample-and-hold capability
Temperature sensor
DMA: 14-channel DMA controller
Supported peripherals: timers, ADC, SDIO,
I
2
S, SPIs, I
2
C, and USART
Debug mode
Serial wire debug (SWD) and JTAG
interfaces
Up to 39 fast I/O
39 multi-functional bi-directional I/Os, all
mappable on 16 external interrupt vectors
and almost all 5 V-tolerant
All fast I/Os, control registers accessible with
f
AHB
speed
Up to 11 timers
Up to 5 x 16-bit timers + 2 x 32-bit timers,
each with 4 IC/OC/PWM or pulse counter
and quadrature (incremental) encoder input
1 x 16-bit motor control PWM advanced
timers with dead-time generator and
emergency stop
2 x watchdog timers (Independent and
Window)
SysTick timer: a 24-bit downcounter
Up to 11 communication interfaces
2 x I
2
C interfaces (SMBus/PMBus)
Up to 3 x USARTs (ISO7816 interface, LIN,
IrDA capability, modem control)
2 x SPIs (50 Mbit/s), both with I
2
S interface
multiplexed
2 x CAN interfaces (2.0B Active)
USB 2.0 full speed interface supporting
crystal-less
1 x SDIO interface
CRC calculation unit, 96-bit unique ID
Packages
QFN48 6 x 6 mm
Table 1. Device summary
Internal Flash
Part number
128 KBytes
TS32F401CBU7
TS32F401CBU7 Datasheet
2020.1.14 2 Ver 1.0
Contents
1 Introduction ............................................................................................................ 6
2 Description ............................................................................................................. 8
2.1 Device overview ................................................................ ................................ ....... 9
2.2 Overview ................................................................................................................ 10
2.2.1 ARM
®
Cortex
®
-M4F with FPU core and DSP instruction set ..................................... 10
2.2.2 Memory protection unit (MPU) ................................................................................... 12
2.2.3 Flash memory ............................................................................................................. 12
2.2.4 Cyclic redundancy check (CRC) calculation unit ....................................................... 12
2.2.5 Embedded SRAM ....................................................................................................... 12
2.2.6 Nested vectored interrupt controller (NVIC) ............................................................... 13
2.2.7 External interrupt/event controller (EXTI) .................................................................. 13
2.2.8 Clocks and startup...................................................................................................... 13
2.2.9 Boot modes ................................................................................................................ 15
2.2.10 Power supply schemes .............................................................................................. 15
2.2.11 Power supply supervisor ............................................................................................ 15
2.2.12 Voltage regulator ........................................................................................................ 16
2.2.13 Low-power modes ...................................................................................................... 16
2.2.14 Direct Memory Access Controller (DMA) ................................................................... 17
2.2.15 Real-time clock (RTC) and backup registers ............................................................. 17
2.2.16 Timers and watchdogs ............................................................................................... 18
2.2.17 Inter-integrated-circuit interface (I
2
C) ......................................................................... 21
2.2.18 Universal synchronous/asynchronous receiver transmitters (USART) ..................... 21
2.2.19 Serial peripheral interface (SPI) ................................................................................. 21
2.2.20 Inter-integrated sound interface (I
2
S) ......................................................................... 21
2.2.21 Secure digital input/output interface (SDIO) .............................................................. 22
2.2.22 Controller area network (CAN) ................................................................................... 22
2.2.23 Universal serial bus (USB) ......................................................................................... 22
2.2.24 General-purpose inputs/outputs (GPIO) .................................................................... 22
2.2.25 Remap capability ........................................................................................................ 22
2.2.26 Analog to digital converter (ADC) .............................................................................. 23
2.2.27 Temperature sensor ................................................................................................... 23
2.2.28 Serial wire JTAG debug port (SWJ-DP) ..................................................................... 23