© Semiconductor Components Industries, LLC, 2016
December, 2020 − Rev. 2
1 Publication Order Number:
FDMA008P20LZ/D
MOSFET - Power, Single
P-Channel, POWERTRENCH
)
−20 V, −11 A , 13 mW
FDMA008P20LZ
General Description
This device is designed specifically for battery charge or load
switching in cellular handset and other ultraportable applications. It
features a MOSFET with low on−state resistance and zener diode
protection against ESD.
The WDFN6 (MicroFET 2.05×2.05) package offers exceptional
thermal performance for its physical size and is well suited to linear
mode applications.
Features
• Max r
DS(on)
= 13 mW at V
GS
= −4.5 V, I
D
= −2.5 A
• Max r
DS(on)
= 16 mW at V
GS
= −2.5 V, I
D
= −1.4 A
• Max r
DS(on)
= 20 mW at V
GS
= −1.8 V, I
D
= −1.0 A
• Max r
DS(on)
= 30 mW at V
GS
= −1.5 V, I
D
= −0.85 A
• Low Profile − 0.8 mm Maximum − in the New Package WDFN6
(MicroFET 2.05 × 2.05 mm)
• HBM ESD Protection Level > 1 kV Typical (Note 3)
• Free from Halogenated Compounds and Antimony Oxides
• RoHS Compliant
MOSFET MAXIMUM RATINGS (T
A
= 25
°
C unless otherwise noted)
Symbol
Parameter
Ratings
Unit
V
DS
Drain to Source Voltage
−20
V
V
GS
Gate to Source Voltage
±
8
V
I
D
Drain Current
Continuous (Note 1a)
−11
A
Pulsed (Note 5)
−164
E
AS
Single Pulse Avalanche Energy (Note 4)
54
mJ
P
D
Power
Dissipation
(Note 1a)
2.4
W
(Note 1b)
0.9
T
J
, T
STG
Operating and Storage Junction
Temperature Range
−55 to
+150
°
C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
THERMAL CHARACTERITICS
Symbol
Parameter
Ratings
Unit
R
q
JA
Thermal Resistance,
Junction to Ambient
(Note 1a)
52
°C/W
(Note 1b)
145
www.onsemi.com
WDFN6 2.05x2.05, 0.65P
CASE 483AV
MARKING DIAGRAM
&2 = Date Code
&K = Lot Code
&Z = Assembly Plant Code
008 = Specific Device Code
&2&K
&Z008
D
D
S
G
D
D
Pin 1
Drain
Source
1
2
3
6
5
4
D
D
G
D
D
S
Bottom Drain Contact
Device
Marking
Package Shipping
{
ORDERING INFORMATION
008 WDFN6
(Pb−Free)
3000 Units/
Tape & Reel
Device
FDMA008P20LZ
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
(Bottom View)
FDMA008P20LZ
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS (T
C
= 25
°
C unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
DSS
Drain to Source Breakdown Voltage
I
D
= −250
m
A, V
GS
= 0 V
−20
V
D
BV
DSS
DT
J
Breakdown Voltage Temperature
Coefficient
I
D
= −250
m
A,
referenced to 25°C
−16
mV/
°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= −16 V, V
GS
= 0 V
−1
m
A
I
GSS
Gate to Source Leakage Current
V
GS
=
±
8 V, V
DS
= 0 V
±
1
m
A
ON CHARACTERISTICS
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= −250
m
A
−0.4
−0.65
−1.4
V
D
V
GS(th)
DT
J
Gate to Source Threshold Voltage
Temperature Coefficient
I
D
= −250
m
A,
referenced to 25°C
3
mV/
°
C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= −4.5 V, I
D
= −2.5 A
10
13
mW
V
GS
= −2.5 V, I
D
= −1.4 A
12
16
V
GS
= −1.8 V, I
D
= −1.0 A
15
20
V
GS
= −1.5 V, I
D
= −0.85 A
20
30
V
GS
= −4.5 V, I
D
= −2.5 A,
T
J
= 125°C
12.8
g
FS
Forward Transconductance
V
DS
= −5 V, I
D
= −2.5 A
26
S
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
V
DS
= −10 V, V
GS
= 0 V,
f = 1 MHz
3131
4383
pF
C
oss
Output Capacitance
424
594
C
rss
Reverse Transfer Capacitance
386
540
R
g
Gate Resistance
13
25
W
SWITCHING CHARACTERISTICS
t
d(on)
T urn−On Delay Time
V
DD
= −10 V, I
D
= −2.5 A,
V
GS
= −4.5 V, R
GEN
= 6 W
12
21
ns
t
r
Rise Time
17
30
t
d(off)
T urn−Off Delay Time
239
382
t
f
Fall Time
96
153
Q
g
Total Gate Charge
V
GS
= −4.5 V, V
DD
= −10 V, I
D
= −2.5 A
28
39
nC
Q
gs
Gate to Source Gate Charge
3.6
Q
gd
Gate to Drain “Miller” Charge
6.2
DRAIN−SOURCE DIODE CHARACTERISTICS
V
SD
Source to Drain Diode Forward Voltage
V
GS
= 0 V, I
S
= −2 A (Note 2)
−0.6
−1.2
V
V
GS
= 0 V, I
S
= −2.5 A (Note 2)
−0.8
−1.3
V
t
rr
Reverse Recovery Time
I
F
= −6.8 A,
di/dt = 100 A/mS
28
46
ns
Q
rr
Reverse Recovery Charge
10
17
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. R
q
JA
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. The diode connected between the gate and the source serves only as protection against ESD. No gate overvoltage rating is implied.
4. E
AS
of 54 mJ is based on starting T
J
= 25°C, L = 3 mH, I
AS
= 6 A, V
DD
= 20 V, V
GS
= 4.5 V. 100% test at L = 0.1 mH, I
AS
= 19 A.
5. Pulsed Id please refer to Figure 10. SOA curve for more details.
a. 52 °C/W when mounted on
a 1 in
2
pad of 2 oz copper
b. 145 °C/W when mounted on
a minimum pad of 2 oz copper