March 2021 United Silicon Carbide, Inc. 2
www.unitedsic.com
This report summarizes the qualification results for the 650V and 1200V UF3C Discrete
SiC Cascodes in D2PAK-7L (TO-263-7L) plastic packages.
The environmental stress tests listed below are performed with pre-stress and post-
stress electrical tests. Reviewing the electrical results for new failures and any
significant shift in performance satisfies the qualification requirements.
Reliability Stress Test Summary
Test Name
MSL 3
Precon
Test Standard
# Samples
x # Lots
Failures
MSL3 Pre Conditioning
JESD22-A113D
T=60
o
C, RH=60%, 40hrs + 3x
IR reflow
77 pcs per
lot, 3 lots per
test, 4 tests
0/924
High Temperature
Reverse Bias
(HTRB)
MIL-STD-750-1
M1038 Method A
(1000 Hours)
T
J
=175
o
C, V=80% V
max
77 pcs per lot
x 3 lots
0/231
High Temperature Gate
Bias
(HTGB)
JESD22 A-108
(1000 Hours)
T
J
=175
o
C, V=100% V
max
(+20V), bias in one direction
77 pcs per lot
x 3 lots
0/231
High Humidity, High
Temperature Reverse
Bias (H3TRB)
Y
JESD22-A101C
(500 Hours)
T
A
=85
o
C, 85% RH, V
GS
=0V,
V
DS
=100V
77 pcs per lot
x 3 lots
0/231
Temperature Cycle
(TC)
Y
JESD22 A-104
-55°C to +150°C
2 cycles/Hr, 1000 cycles
77 pcs per lot
x 3 lots
0/231
Autoclave
(PCT)
Y
JESD22 A-102
121°C/ RH = 100%, 96 hours,
15psig
77 pcs per lot
x 3 lots
0/231
Intermittent Operating
Life
Y
MIL-STD-750
Method 1037
DTJ ≥125°C, 3000 cycles
(5 minutes on/ 5 minutes off)
77 pcs per lot
x 3 lots
0/231
Parametric Verification Per Datasheet
100% FT x 3
lots