1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2010, Zarlink Semiconductor Inc. All Rights Reserved.
Contents
1.0 Heading
2.0 Latching the Time of Day (ToD) seed
3.0 Tracking the Time of Day (ToD) information
1.0 Heading
Many of today's Timing applications (e.g., Wireless
basestations) require precise ToD (Time of Day)
information in addition to the frequency and phase
synchronization. The ToD information can come from
several different sources (e.g., GPS receiver or
Recovered ToP (Timing over Packet stream) that may
or may not reside directly on the Network timing card.
Typical Network synchronization PLLs have no
concept of the ToD, but it can be very useful to have
accurate, easily assessable ToD information on the
Timing Card. The ZL30142/143/342/343/347 allows
the user to load a ToD (Time of Day) seed into the
device from the ToD source, via the SPI
microprocessor interface. This ToD information is
synchronized with the incoming reference clock and
Sync pulse (i.e., 10 MHz clock and 1PPS sync forma
GPS receiver) allowing the device to provide a
continuous update of the ToD value, that is accessible
through the SPI microprocessor port. This application
note will detail the steps necessary to latch in the ToD
seed and track it.
December 2010
ZLAN-265
Applications of the ZL30142/143/342/343/347
Tracking ToD Information
Application Note
Figure 1 - Example Setup
GPS
Receiver
CPU
RefX
SyncX
ZL30142/143/342/343/347
10MHz
ToD
SPI
1PPS
ZLAN-265 Application Note
2
Zarlink Semiconductor Inc.
2.0 Latching the Time of Day (ToD) seed
1. Enable and Configure the ToD_up date register
a. Read the DCO_update register (page A, address 0x6C)
curRegValue = Read(page A, address 0x6C)
b. Set the enable_ToD_update bits [1:0] of the DCO_update register equal to '11'.
curRegValue = curRegValue | 0x03
Write(page A, address 0x6C, curRegValue )
c. Configure the ToD_update_config registers (page A, addresses 0c74 and 0x75)
Write(page A, address 0x74, 0x12 )
Write(page A, address 0x75, 0x7A )
d. (optional) Change the Update interval by configuring the ToD_update_interval
bits [3:0] in the Interval_Control register (page A, address 0x71)
Default ToD_update_interval bits [3:0] = '0111' = 7d
Default Update interval = (2ToD_update_interval+17)*12.5ns
= 2(7+17)*12.5ns = 209.7ms
2. Align the internal 1 Hz to external 1PPS sync pulse
a. Read the ToP_1Hz_alignment register (page A, address 0x72)
curRegValue = Read(page A, address 0x72)
b. Clear bits 2,3,4,5 of the ToP_1Hz_alignment register while preserving the other
register settings.
curRegValue = curRegValue & 0xC3
c. Set the 1Hz_sync_ctrl bits [5:4] of the ToP_1Hz_alignment register equal to
'01' which will set an interrupt.
curRegValue = curRegValue | 0x10
Write(page A, address 0x72, curRegValue )
d. Wait for the interrupt to clear by monitoring the ToP_1Hz_alignment register
until bits 4 and 5 are cleared.
LOOP:
{
curRegValue = Read(0xA_72)
if ((curRegValue & 0x30) == 0) {BREAK}
else {CONTINUE}
}