Real-Time Clock in Microsemi Fusion FPGAs
2 Revision 2
These characteristics and capabilities of the Fusion RTC make this block an ideal choice for applications
using a real-time clock. By using the RTC block of Fusion devices, the real-time clock application can be
integrated into the FPGA, reducing the cost/size of the application hardware.
Implementation
If the crystal oscillator, driving the RTC block of Fusion FPGAs, is set to 32.768 kHz, 7-bit of the RTC
block is toggle at the rate of one Hz. The contents of the first byte of the RTC count register can be
accessed using the SmartGen IP. 7-bit of the RTC creates a one Hz periodic signal for the FPGA fabric.
This signal can drive specific counters, implemented in the FPGA fabric by users, in which the seconds,
minutes, hours, days, months, or years reside.
Real-Time Clock Preset
The register inside the FPGA fabric holding the real-time clock value can be preset (written) to a user
defined value at any time. Furthermore, the RTC count register can be preset to a user-defined value if
needed, using SmartGen IP. Real-time clock implementations in which only 7-bit of the RTC is used to
create one Hz pulses to the FPGA fabric do not need to write into the RTC. In such applications,
presetting the clock only requires writing into the FPGA fabric registers in which the time is stored.
Real-Time Clock in Standby Mode
In many low power applications, the FPGA fabric enters and exits standby mode by powering down the
1.5 V supply to the FPGA fabric. The RTC block is powered by the external 3.3 V supply, and therefore it
keeps counting during standby mode. Consequently, the content of the RTC provides information of the
elapsed time in standby mode.
If a user application requires the real-time clock to be automatically updated after exiting standby mode,
the current real-time must be stored in the embedded Flash memory before entering standby mode.
When the 1.5 V supply to the FPGA fabric is powered up again, the last content of the real-time clock
registers is retrieved from the embedded Flash memory and adjusted based on the elapsed time
extracted from RTC. Then the updated time can be preset into the FPGA fabric registers and the
real-time clock continues to operate as normal based on the one Hz pulses coming from RTC.
Figure 1 • Generating Match Signal from RTC Register Content