12V Hot Swap Controller

with ispPAC-POWR1220AT8

April 2010 Reference Design RD1068

www.latticesemi.com 1 rd1068_01.0

or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

Introduction

A hot swap controller is used to limit the inrush current when a circuit board is plugged into a powered backplane.

In addition, a hot swap controller may offer some or all of the following features: over-current protection (electronic

circuit breaker), over-voltage protection, and under-voltage protection. Hot swap controllers are also required to

isolate the board from the backplane which is useful in troubleshooting, maintenance, and upgrade activities. The

power-down request may come from the backplane (remote) or an on-board switch (manual).

This document describes how a Lattice Power Manager II ispPAC

-POWR1220AT8 can be used to implement the

functions required for 12V hot swap applications. This reference design is targeted to operate on the Power Man-

ager Hercules Development Kit (PAC-POWR1220AT8-HS-EVN – Standard or PAC-POWR1220AT8-HA-EVN –

Advanced).

Features

• Programmable inrush current limit (default 2 amps)

• Programmable de-bounce delay (default 30ms)

• Programmable over-current limit (default 15 amps)

• Over and under-voltage limits both at source and load

• Short circuit protection

• Programmable SOA drive of N-channel MOSFET

• Power supply OR’ing

Functional Description

Figure 1 shows the top level view of the 12V Hot Swap design. Q1 is a power N-MOSFET that functions as the 12V

power switch; when it is on, 12V is supplied to the board and when it is off the board is disconnected from the 12V

source.

Figure 1. 12V Hot Swap Block Diagram

VMONs HVOUT VMON

Hot Swap Controller

ispPAC-POWR1220AT8

To Hold

Off Cap

and Load

R2 Q1

From 12V

Supply

Voltage Pump with

Gate Driver

OUT

R30,R37

R38 R27

R35R31

12V Hot Swap Controller

Lattice Semiconductor with ispPAC-POWR1220AT8

R2 is a current shunt that senses the 12V current. The small voltage drop across R2 is amplified by U2 and con-

verted into a current. This output current returns to a ground referenced voltage as it passes through resistors R30

and R37. Thus, the amplifier U7 combined with appropriate values of resistors generates a voltage that can be

read by the ispPAC-POWR1220AT8 VMON input that is proportional to the 12V current.

Resistor dividers (R38:R31 and R27:R35) are used to reduce the 12V to a safe level for the ispPAC-

POWR1220AT8 VMON inputs. One divider is used to sense the 12V level at the source and the second divider is

used to sense the 12V level on the load side of Q1. The divider ratio is 4:1 such that a 12.0V level will read 3.0V at

the VMON pin. The exact value of the lower resistor takes into account the parallel loading of the VMON input

impedance.

Q1 must be fully turned-on in order to minimize the voltage drop from drain to source. This means the gate voltage

needs to be driven to a level of about 18V. This will assure there is enough gate-to-source bias on top of the 12V

level of the source and load. As the HVOUT pins can only drive to 12V (10V for non -02 devices) a voltage-pump

circuit is used to generate the 18V. This circuit essentially adds the HVOUT voltage to the incoming 12V, minus a

few diode drops, to provide the roughly 18V required to bias on Q1.

The Hot Swap Controller is implemented in the PLD portion of the ispPAC-POWR1220AT8 and provides many

functions. First and foremost is the hysteretic control of Q1 to limit the inrush current. A feedback loop is used to

control Q1 based on the current sensed in R2. The limits in this loop are adjusted dynamically to operate the power

MOSFET Q1 within its safe area (SOA). Additional limits on the current sensed in R2 are used for over-current pro-

tection or an electronic circuit-breaker.

Design Description

Figure 2 provides complete details of the 12V current monitor circuit. The significant change from the block dia-

gram of Figure 1 is the string of resistors and components driven from the output of the amplifier U7. Starting on

the left, the Zener diode D18 protects the inputs of the ispPAC-POWR1220AT8 from voltage spikes that may result

from current or voltage spikes on the 12V supply.

Figure 2. 12V Current Monitor Circuit

R29 and Q9 provide an over-current signal that is routed to a digital input to provide a faster response than the

VMON path. One of the 10k resistors in the array RN2 provides a pull-down on the over-current input. When the

0.010

ZXCT1009

10mA/V

From 12V

Supply

R37

10.7k

D18

5.1V

R30

1.02k

R29

270

RN2

10k

2N3906

3.00V

VMON

1.02V

MOSFE

and

Voltage

Sense

PLD

Sequence

Exceptions

and

Logic

Equations

OUT

Power Manager II

ispPAC-POWR1220AT8

65k