www.latticesemi.com
1
an6067_01.0
November 2005 Application Note AN6067
ispPAC-POWR1220AT8 I
2
C Hardware
Verification Utility User’s Guide
Introduction
The ispPAC
®
-POWR1220AT8 device from Lattice is a full-featured second-generation Power Manager chip. As part
of its feature set, this device supports the I
2
C serial communication specifications. The I
2
C pins of the device pro-
vide a system designer the ability to monitor and control numerous aspects of the Power Manager device and sys-
tem from a master I
2
C device, such as reading VMON pins with on-board ADC, setting, clearing, or monitoring
input or output pins, and adjusting the Trim DAC settings, just to name a few. A Windows-based utility is provided by
Lattice so customers can exercise and observe all the I
2
C features of the ispPAC-POWR1220AT8 without having to
develop code or build hardware. When this utility is combined with PAC-Designer
®
, a download cable, and an eval-
uation board (and power supply) all the I
2
C features can be observed, designs can be developed, and hardware
can be verified. This application note provides documentation specifically on the software utility and generally on
some of the I
2
C features of the ispPAC-POWR1220AT8.
This software utility is specifically designed to support the ispPAC-POWR1220AT8 through the I
2
C port on the Lat-
tice ispPAC-POWR1220AT8 evaluation board. The utility takes advantage of the Lattice ispDOWNLOAD
®
cable
(parallel port versions only), to communicate the I
2
C commands for reading and writing both data and instructions.
This software is not intended as a generic I
2
C controller or development tool but a useful utility to exercise and
demonstrate the capabilities of the Lattice ispPAC-POWR1220AT8 Power Manager device.
Figure 1. ispPAC-POWR1220AT8 I
2
C Utility User Interface
Getting Started
The typical setup shown in Figure 2 includes a PC equipped with a parallel printer port, a Lattice ispDOWNLOAD
cable that plugs into that port, power supply, and an ispPAC-POWR1220AT8 evaluation board. The computer
should have the latest version of PAC-Designer installed along with the I
2
C utility. First, PAC-Designer is used to
configure and program the ispPAC-POWR1220AT8 with the download cable plugged into the JTAG connector on
ispPAC-POWR1220AT8 I
2
C Hardware
Lattice Semiconductor Verification Utility User’s Guide
2
the evaluation board. The cable is then moved from the JTAG connector to the I
2
C connector so the I
2
C utility can
be used.
Figure 2. Typical Setup
The I
2
C utility is designed with a simple push-button interface as shown in Figure 1. The buttons are organized to
support the various sections of the ispPAC-POWR1220AT8 that can be controlled or monitored by I
2
C. The first but-
ton that one should use is the “I
2
C Address” button located top and center. This button will open the dialog box
shown in Figure 3 so the address that was programmed into the device with PAC-Designer can also be used by the
utility to address the device. If the addresses do not match then the device will not respond to the commands and
data that are being sent to it.
Figure 3. Setting the Target Device’s Address
Cable Detect
When any of the other buttons shown in Figure 1 are clicked, the utility will verify both that the download cable is
connected to the parallel port and that the cable has power. If either test fails, then the respective message in
Figure 4 will be displayed.
Figure 4. Missing Cable and Cable Power Warnings
Computer
Power
Supply
ispPAC-
POWR1220AT8
Evaluation Board
ispDOWNLOAD
Cable