www.latticesemi.com 9-1 an6068_01.1

February 2011 Application Note AN6068

or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

Introduction

The primary function of the ispPAC

-POWR1220AT8 is to monitor, measure, trim/margin and to sequence the

application of power to electronic devices in complex, multi-supply environments. As with other members of the

Power Manager II family from Lattice, the ispPAC-POWR1220AT8 is also a non-volatile E

CMOS

device and can

be programmed through its JTAG port. As such the configuration programming of the ispPAC-POWR1220AT8 can

be done “in-system” during manufacturing. There are numerous manufacturing advantages associated with In-Sys-

tem Programmability (ISP™) such as simplified inventory management, reduced parts handling requirements and

less complex assembly and test flows. Likewise, ISP designs support design changes and system upgrades

throughout the life of a project with reduced design effort.

Configuration development for the ispPAC-POWR1220AT8 is accomplished using the Lattice-provided PAC-

Designer

software design tool. PAC-Designer is a Windows

-based tool that provides engineers with an intuitive

user-friendly graphical interface. This tool simplifies the task of learning, simulating, and designing power manage-

ment solutions to a series of point-and-click operations.

Special design considerations arise when programming an ispPAC-POWR1220AT8 that is placed in a serial chain

with other JTAG compliant devices. The first and most obvious challenge is when the power to other JTAG devices

in the chain is controlled or sequenced by the ispPAC-POWR1220AT8. This is illustrated in the block diagram of

Figure 9-1. In this diagram the devices in the chain that precede the ispPAC-POWR12220AT8 are not powered until

the ispPAC-POWR1220AAT8 enables the supplies to them. However, the un-programmed ispPAC-POWR1220AT8

cannot enable the supplies until it is programmed through the JTAG chain. But, the JTAG chain remains broken by

the powered down devices and the crossed out nets in Figure 9-1 highlight the broken links. Thus, another method

of connecting devices for programming is suggested.

Figure 9-1. ispPAC-POWR1220AT8 in a “Broken” JTAG Chain

TDI

TCK

TMS

TDO

Power Supplies

JTAG

Device 1

JTAG

Device 2

ispPAC-POWR

1220AT8

TDI TDI TDI TDOTDOTDO

TCK TCK TCK TMSTMSTMS

VCC VCC VCC

HVOUT

JTAG Programming

Connector

Programming the ispPAC-POWR1220AT8 in

a JTAG Chain Using the ATDI Pin

Programming the ispPAC-POWR1220AT8

Lattice Semiconductor in a JTAG Chain Using the ATDI Pin

9-2

There are several alternative solutions that will address the issue of initially programming the Power Manager II.

• Avoid it altogether by using a preprogrammed ispPAC-POWR1220AT8 device.

• Put the ispPAC-POWR1220AT8 into a separate JTAG chain and use multiple JTAG connections.

• Use the ispPAC-POWR1220AT8’s proprietary, alternate TDI mode.

The first option sacrifices the flexibility of in-system programming and limits future re-programming options.

The second option adds both the cost and complexity of multiple JTAG interface connections. Many boards have

physical restrictions and do not have the space required for a second connector.

The third option combines the flexibility of in-system programming with access to all the JTAG devices through a

single serial connection. By using its alternative TDI input pin (ATDI), it is possible to send commands and data to

program an ispPAC-POWR1220AT8 by physically bypassing the other devices in the same serial chain. Figure 9-2

illustrates the ATDI connection to the ispPAC-POWR1220AT8 at the end of the chain that provides a bypass path.

Notice that while the other devices may be powered down, they are still connected to TMS and TCK. Therefore, for

this circuit to function properly, they should be “hot socket” compatible so they do not load-down or clamp the TMS

or TCK signals.

Figure 9-2. The ATDI Pin is Used to Physically Bypass Powered Down Devices

Figure 9-2 also shows the optional connection to the ispPAC-POWR1220AT8 TDISEL pin. This pin can be used to

directly control the selection of either the TDI or ATDI pin for JTAG programming. The TDISEL pin connection is

optional because there is also a software method of selecting between the TDI and ATDI pins. The software solu-

tion is realized by modifying the programming routine and makes use of the existing JTAG pins.

Enabling ATDI Through TDISEL Pin

The TDISEL pin has an internal pull up so that when it is left unconnected the ispPAC-POWR1220AT8 will default

to the standard TDI pin for JTAG input. When the TDISEL pin is driven low the ispPAC-POWR1220AT8 will uncon-

TDI

TCK

TMS

TDO

Power Supplies

JTAG

Device 1

JTAG

Device 2

ispPAC-POWR

1220AT8

TDI TDI

TDI

TDOTDOTDO

TCK TCK TCK TMSTMSTMS

VCC VCC VCC

HVOUT

JTAG Programming

Connector

ATDI

TDISEL