15801 Chemical Lane, Hunti ngton Beach, CA 92649-1595
Phone: (714) 898-0960 • FAX: (714) 896-0971
www.rhombus -in d .c o m
•
email: sales@
rhombus-ind.com
Rhombus
Industries Inc.
For other values & Custom Desi gns, contact factory.
Specifications subject to change without notice.
ACDM 9901
ACDM
14-Pin Schematic
1
IN
4
6
Tap4
7
GND
Tap5
8
10
Tap1
12
Vcc
14
Tap3
Tap2
ACDM
Ser ies
Advanced CMOS Logic
Buffered 5-Tap Delay Modules
74ACT type input is compatible with TTL Outputs can Source / Sink 24 mA
P/N Description ACDM - XXX X
74ACT Buffered 5 Tap Delay
Molded Pac kage Series:
14-pin DIP:
ACDM
Total Delay i n nanoseconds (ns )
Lead Styl e: Blank = Thru-hol e
G = “Gull Wing” SMD
J = “J” Bend SMD
Exampl es: ACDM-25G = 50ns (10ns / tap) 74ACT,
14-Pin G-SMD
ACDM-100 = 100ns (20ns / tap) 74ACT, 14-Pi n
DIP
Elect ri cal Speci ficati ons at 25
O
C
74ACT 5 Tap
14-pin DIP P/N
Tap Delay Tolerances +/- 5% or 2ns (+/- 1ns <13ns)
Tap-to-Tap
(ns)
Tap 1 Tap 2 Tap 3 Tap 4 Total - Tap 5
ACDM-30
6.0 12.0 18.0 24.0 30 ± 2.0 6 ± 2.0
ACDM-35
7.0 14.0 21.0 28.0 35 ± 2.0 7 ± 2.0
ACDM-40
8.0 16.0 24.0 32.0 40 ± 2.0 8 ± 2.0
ACDM-50
10.0 20.0 30.0 40.0 50 ± 2.5 10 ± 2.0
ACDM-60
12.0 24.0 36.0 48.0 60 ± 3.0 12 ± 2.0
ACDM-75
15.0 30.0 45.0 60.0 75 ± 3.75 15 ± 2.5
ACDM-80
16.0 32.0 48.0 64.0 80 ± 4.0 16 ± 3.0
ACDM-100
20.0 40.0 60.0 80.0 100 ± 5.0 20 ± 3.0
ACDM-125
25.0 50.0 75.0 100.0 125 ± 6.25 25 ± 3.0
ACDM-150
30.0 60.0 90.0 120.0 150 ± 7.5 30 ± 3.0
ACDM-200
40.0 80.0 120.0 160.0 200 ± 10.0 40 ± 4.0
ACDM-250
50.0 100.0 150.0 200.0 250 ± 12.5 50 ± 5.0
Low Profile 14-Pin Package
Two Surface Mount Versions
Available in Low Voltage CMOS
74LVC Logic version LVIDM Series
5 Equal Delay Taps
Oper ati ng Te m p. -40
O
C to +85
O
C
OPERATING SPECIFICATIONS
Supply V ol tage, V
CC
...................................... 5.00
±
0.50 VDC
Supply Current , I
CC
........................... 14 mA typ., 28 mA max.
I
CCH
, V
IN
= V
CC
, V
CC
= 5.5V ............................. 40
µ
A typ.
I
CCL
, V
IN
= 0V, V
CC
= 5.5V ............................. 25 mA typ.
Logic “1” Input : V
IH
........................... 2.00 V min., 5.50V max.
Logic “0” Input : V
IL
.............................................. 0.80 V max.
Logic “1” Vol t age Out, V
OH
...................................... 3.8 V min.
Logic “0” Vol t age Out, V
OL
................................... 0.44 V max.
Max. Input Current, I
IN
................................................
±
1.0
µ
A
Minimum Input Pulse Width........................ 40% of Delay min.
Operating Temperature Range ......................... -40
O
to +85
O
C
Storage Temperature Range ......................... -65
O
to +150
O
C
TEST CONDITIONS
-- Advanced CMOS, 74ACT
V
CC
Supply Voltage................................................ 5.00VDC
Input Pulse Voltage ................................................... 3.00V
Input Pulse Rise Time ....................................... 3.0 ns max.
Input Pulse Width / Period ........................... 1000 / 2000 ns
1. Measurem ents made at 25
O
C
2. Delay Ti m es measured at 1.50V level of input to
+2.50V lev el of Output on leadi ng edge.
3. Rise Ti m es measured from 10% to 90% poi nt s.
4. 50pf probe and fi xture load on output under test .
.300
(7.62)
.285
(7.24)
MAX.
.008 R
(0.20)
.365
(9.27)
MAX.
.010
(0.25)
TYP.
.120
(3.05)
MIN.
.250
(6.35)
MAX.
.020
(0.51)
.785
(19.94)
MAX.
.050
(1.27)
TYP.
.020
(0.51)
TYP.
.100
(2.54)
TYP.
Dimensions in Inches (mm)
.400 (10.16)
.430 (10.92)
.285
(7.24)
MAX.
.010
(0.25)
TYP.
.008 R
(0.20)
.030
(0.76)
TYP.
.330 (8.38)
MAX.
.020 R
(0.51)
.285
(7.24)
MAX.
.285 (7.24)
.260 (6.60)
.250
(6.35)
MAX.
.015
(0.38)
TYP.
.785
(19.94)
MAX.
.050
(1.27)
TYP.
.020
(0.51)
TYP.
.100
(2.54)
TYP.
.785
(19.94)
MAX.
.265
(6.73)
MAX.
.030
(0.76)
TYP.
.050
(1.27)
TYP.
.020
(0.51)
TYP.
.100
(2.54)
TYP.
G-SMD G-SMD
J-SMD
J-SMD
DIP DIP