8-Channel DAS with 14-Bit, Bipolar Input,
Simultaneous Sampling ADC
Data Sheet
AD7607
Rev. D
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FEATURES
8 simultaneously sampled inputs
True bipolar analog input ranges: ±10 V, ±5 V
Single 5 V analog supply and 2.3 V to 5.25 V V
DRIVE
Fully integrated data acquisition solution
Analog input clamp protection
Input buffer with 1 MΩ analog input impedance
Second-order antialiasing analog filter
On-chip accurate reference and reference buffer
14-bit ADC with 200 kSPS on all channels
Flexible parallel/serial interface
SPI/QSPI™/MICROWIRE™/DSP compatible
Pin-compatible solutions from 14 bits to 18 bits
Performance
7 kV ESD rating on analog input channels
Fast throughput rate: 200 kSPS for all channels
85.5 dB SNR at 50 kSPS
INL ±0.25 LSB, DNL ±0.25 LSB
Low power: 100 mW at 200 kSPS
Standby mode: 25 mW typical
64-lead LQFP package
APPLICATIONS
Power-line monitoring and protection systems
Multiphase motor control
Instrumentation and control systems
Multiaxis positioning systems
Data acquisition systems (DAS)
Table 1. High Resolution, Bipolar Input, Simultaneous
Sampling DAS Solutions
Resolution
Single-Ended
Inputs
Number of Simultaneous
Sampling Channels
18 Bits
AD7608
8
16 Bits AD7606 8
AD7606-6 6
AD7606-4 4
14 Bits AD7607 8
FUNCTIONAL BLOCK DIAGRAM
V1
V1GND
R
FB
1MΩ
1MΩ
R
FB
CLAMP
CLAMP
SECOND-
ORDE R LPF
T/H
V2
V2GND
R
FB
1MΩ
1MΩ
R
FB
CLAMP
CLAMP
SECOND-
ORDE R LPF
T/H
V3
V3GND
R
FB
1MΩ
1MΩ
R
FB
CLAMP
CLAMP
SECOND-
ORDE R LPF
T/H
V4
V4GND
R
FB
1MΩ
1MΩ
R
FB
CLAMP
CLAMP
SECOND-
ORDE R LPF
T/H
V5
V5GND
R
FB
1MΩ
1MΩ
R
FB
CLAMP
CLAMP
SECOND-
ORDE R LPF
T/H
V6
V6GND
R
FB
1MΩ
1MΩ
R
FB
CLAMP
CLAMP
SECOND-
ORDE R LPF
T/H
V7
V7GND
R
FB
1MΩ
1MΩ
R
FB
CLAMP
CLAMP
SECOND-
ORDE R LPF
T/H
V8
V8GND
R
FB
1MΩ
1MΩ
R
FB
CLAMP
CLAMP
SECOND-
ORDE R LPF
T/H
8:1
MUX
AGND
BUSY
FRSTDATA
CONVS T A
CONVS T B
RESET
RANGE
CONTROL
INPUTS
CLK O SC
REFIN/REFOUT
REF SELECT
AGND
OS 2
OS 1
OS 0
D
OUT
A
D
OUT
B
RD/SCLK
CS
PAR/SER/ BYTE SEL
V
DRIVE
14-BIT
SAR
DIGITAL
FILTER
PARALLEL/
SERIAL
INTERFACE
2.5V
REF
REFCAPB
REFCAPA
SERIAL
PARALLEL
REGCAP
2.5V
LDO
REGCAP
2.5V
LDO
AV
CC
AV
CC
DB[15:0]
AD7607
08096-001
Figure 1.
AD7607 Data Sheet
Rev. D | Page 2 of 32
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
General Description ......................................................................... 3
Specifications ..................................................................................... 4
Timing Specifications .................................................................. 6
Absolute Maximum Ratings .......................................................... 10
Thermal Resistance .................................................................... 10
ESD Caution ................................................................................ 10
Pin Configuration and Function Descriptions ........................... 11
Typical Performance Characteristics ........................................... 14
Terminology .................................................................................... 18
Theory of Operation ...................................................................... 19
Converter Details ........................................................................ 19
Analog Input ............................................................................... 19
ADC Transfer Function ............................................................. 20
Internal/External Reference ...................................................... 21
Typical Connection Diagram ................................................... 22
Power-Down Modes .................................................................. 22
Conversion Control ................................................................... 23
Digital Interface .............................................................................. 24
Parallel Interface (
PAR
/SER/BYTE SEL = 0) .......................... 24
Parallel Byte Interface (
PAR
/SER/BYTE SEL = 1, DB15 = 1) .. 24
Serial Interface (
PAR
/SER/BYTE SEL = 1) ............................. 24
Reading During Conversion ..................................................... 25
Digital Filter ................................................................................ 26
Layout Guidelines ........................................................................... 29
Outline Dimensions ....................................................................... 31
Ordering Guide .......................................................................... 31
REVISION HISTORY
5/2018—Rev. C to Rev. D
Changes to Patent Note, Note 1 ...................................................... 3
Change to t
CONV
Parameter, Table 3 ................................................ 6
2/2016—Rev. B to Rev. C
Changes to Patent Note, Note 1 ...................................................... 3
Changes to Figure 35 ...................................................................... 20
Change to Figure 36 ....................................................................... 21
Changes to Ordering Guide .......................................................... 31
1/2012—Rev. A to Rev. B
Changes to Analog Input Ranges Section ................................... 19
7/2010—Rev. 0 to Rev. A
Change to Table 1 .............................................................................. 1
7/2010—Revision 0: Initial Versi on