16-Channel DAS with 16-Bit, Bipolar Input,
Dual Simultaneous Sampling ADC
Data Sheet
AD7616-P
Rev. 0 Document Feedback
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FEATURES
16-channel, dual, simultaneously sampled inputs
Independently selectable channel input ranges
True bipolar: ±10 V, ±5 V, ±2.5 V
Single 5 V analog supply and 2.3 V to 3.6 V V
DRIVE
supply
Fully integrated data acquisition solution
Analog input clamp protection
Input buffer with 1 MΩ analog input impedance
1st-order antialiasing analog filter
On-chip accurate reference and reference buffer
Dual 16-bit SAR ADC
Throughput rate: 2 × 1 MSPS
Oversampling capability with digital filter
Flexible sequencer with burst mode
Parallel digital interface
Optional CRC error checking
Hardware/software configuration
Performance
92 dB SNR at 500 kSPS (2× OSR)
90.5 dB SNR at 1 MSPS
−103 dB THD
±1 LSB INL (typical), ±0.99 LSB DNL (maximum)
8 kV ESD rating on analog input pins
On-chip self detect function
80-lead LQFP package
APPLICATIONS
Power line monitoring
Protective relays
Multiphase motor control
Instrumentation and control systems
Data acquisition systems (DASs)
GENERAL DESCRIPTION
The AD7616-P is a 16-bit, DAS that supports dual simultaneous
sampling of 16 channels. The AD7616-P operates from a single
5 V supply and can accommodate ±10 V, ±5 V, and ±2.5 V true
bipolar input signals while sampling at throughput rates up to
1 MSPS per channel pair with 90.5 dB SNR. Higher signal-to-
noise ratio (SNR) performance can be achieved with the on-chip
oversampling mode (92 dB for an oversampling ratio (OSR) of 2).
The input clamp protection circuitry tolerates voltages up to
±21 V. T h e AD7616-P has 1 MΩ analog input impedance,
regardless of sampling frequency. The single-supply operation,
on-chip filtering, and high input impedance eliminate the need
for driver op amps and external bipolar supplies.
The device contains analog input clamp protection, a dual, 16-bit
charge redistribution successive approximation register (SAR)
analog-to-digital converter (ADC), a flexible digital filter, a
2.5 V reference and reference buffer, and a high speed parallel
interface.
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
FIRST-
ORDER L PF
FIRST-
ORDER L PF
9:1
MUX
BUSY
CONVST
CONTROL
INPUTS
CLK OSC
REFINOUT
REFSEL
PAR
OSR
DIGITAL
FILTER
2.5V
REF
REFCAP
V
CC
AGND
REGCAP
REGCAPD
1.8V
DLDO
9:1
MUX
16-BIT
SAR
16-BIT
SAR
V
DRIVE
2:1
MUX
HW_RNGSEL0, HW_RNGS E L1
CHSEL 2 TO CHS E L0
SEQEN
FLEXIBLE
SEQUENCER
WR/BURST
RESET
DGND
DB15 TO DB0
PARALLEL
FIRST-
ORDER L PF
CLAMP
CLAMP
FIRST-
ORDER L PF
1.8V
ALDO
PARALLEL
INTERFACE
1MΩ
R
FB
R
FB
1MΩ
V0A
V0AGND
V7A
V7AGND
V0B
V0BGND
V7B
V7BGND
CLAMP
CLAMP
1MΩ
R
FB
R
FB
1MΩ
CLAMP
CLAMP
1MΩ
R
FB
R
FB
1MΩ
CLAMP
CLAMP
1MΩ
R
FB
R
FB
1MΩ
V
CC
ALDO
AD7616-P
15695-001
AD7616-P Data Sheet
Rev. 0 | Page 2 of 46
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Specifications .................................................................. 6
Absolute Maximum Ratings ............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 13
Terminology .................................................................................... 19
Theory of Operation ...................................................................... 21
Converter Details........................................................................ 21
Analog Input ............................................................................... 21
ADC Transfer Function ............................................................. 22
Internal/External Reference ...................................................... 22
Shutdown Mode .......................................................................... 23
Digital Filter ................................................................................ 23
Applications Information .............................................................. 24
Functionality Overview ............................................................. 24
Power Supplies ............................................................................ 24
Typical Connections .................................................................. 24
Device Configuration ..................................................................... 25
Operational Mode ...................................................................... 25
Internal/External Reference ...................................................... 25
Hardware Mode .......................................................................... 25
Software Mode ............................................................................ 26
Reset Functionality..................................................................... 26
Pin Function Overview ............................................................. 26
Digital Interface .............................................................................. 27
Channel Selection ....................................................................... 27
Parallel Interface ......................................................................... 28
Sequencer......................................................................................... 30
Hardware Mode Sequencer ....................................................... 30
Software Mode Sequencer ......................................................... 30
Burst Sequencer .......................................................................... 31
Diagnostics ...................................................................................... 33
Diagnostic Channels .................................................................. 33
Interface Self Test ....................................................................... 33
CRC .............................................................................................. 33
Register Summary .......................................................................... 35
Addressing Registers .................................................................. 36
Configuration Register .............................................................. 37
Channel Register ........................................................................ 38
Input Range Registers ................................................................ 39
Sequencer Stack Registers ......................................................... 42
Status Register ............................................................................. 45
Outline Dimensions ....................................................................... 46
Ordering Guide .......................................................................... 46
REVISION HISTORY
6/2017—Revision 0: Initial Version