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DALLAS

SEMICONDUCTOR

ERRATA SHEET DS5000(T) Revision D2 11/15/01

Revision D2 may be identified by the date/revision brand yywwD2, where yy and ww are the year and

workweek of manufacture, respectively. This errata sheet is valid only when used in conjunction with

the most current version of the data sheet available from Dallas Semiconductor via the Internet.

This document contains the following types of information:

Errata: These are design errors which deviate from published specifications. Errata are intended to

be fixed in subsequent revisions of the device.

Specification Modifications: These are changes to the published specifications and will be reflected

in the next update of the documentation and apply to all subsequent revisions of the device.

Documentation Changes: This information includes typographical mistakes, errors, omissions or

clarifications of device operation. Items listed in this section will be reflected in the next update

of the documentation.

These errata, specification modifications and documentation changes apply to all memory

configurations and speed grades unless otherwise noted.

ERRATA

1. When using the encryption mode, if data other than all 00h is used in the first four program

locations, the part may draw higher than expected current in battery-backed mode. The resulting

battery current increase will be directly proportional to the number of bits which are set to a logic

one state. Applications of the DS5000(T) where encryption is not used will not experience this

problem.

Work Around: When using encryption, program instructions located in the first four address

locations (0000h, 0001h, 0002h, 0003h) must be all zeros (00). These memory locations contain

the interrupt vectors for both the RESET and External Interrupt 0 (INTO). Since 00h is the code

for a NOP instruction, the DS5000(T) will execute them without affecting system operation. It is

possible to use a bit test of the EA (Global interrupt enable) bit to test if the part is vectoring to

either a RESET or INT0 location. This is possible since a RESET will clear the enable bit (EA=0),

while the INT0 vector would leave the enable bit set (EA=1) to allow interrupts. As a result a

minor software change will prevent the part from drawing excessive current battery-backed mode.

The test should be performed at location 0004h. All remaining program memory locations can be

programmed as desired.

SPECIFICATION MODIFICATIONS

1. NONE

DOCUMENTATION CHANGES

1. NONE