Dedicated Pin 144-Pin TQFP 256-Pin FBGA
256-Pin MBGA
IO/GCLK0 18 H5
K1
IO/GCLK1 20 J5
L1
IO/GCLK2 89 J12
M20
IO/GCLK3 91 H12
L20
IO/DEV_OE 60 M8
W12
IO/DEV_CLRn 61 M9
Y13
TDI 34 L6
U2
TMS 33 N4
T3
TCK 35 P3
W2
TDO 36 M5
V2
GNDINT 17, 54, 92, 128 H7, H9, J8, J10
J4, U12, M17, D12
GNDIO 10, 26, 47, 65, 83, 99, 115, 135 A1, A16, B2, B15, G7, G8, G9,
G10, K7, K8, K9, K10, R2, R15,
T1, T16
H3, J3, M4, N3, U9, V8, V9,
V13, H18, J17, N18, C8, D9,
C12, C13, M18
VCCINT (1)
19, 56, 90, 126 H8, H10, J7, J9
K4, U11, L17, D11
VCCIO1 (2)
9, 25 C1, H6, J6, P1
K3, L3, L4, M3
VCCIO2 (2)
116, 136 A3, A14, F8, F9
C9, C10, D10, C11
VCCIO3 (2)
82, 100 C16, H11, J11, P16
J18, K17, K18, L18
VCCIO4 (2)
46, 64 L8, L9, T3, T14
U10, V10, V11, V12
No Connect (N.C.) - -
-
Total User I/O Pins 116 212
212
Notes:
1. For EPM1270 devices, all VCCINT pins must be connected to either 3.3 V or 2.5 V, but not a combination of both.
For EPM1270G devices, all VCCINT pins must be connected to 1.8 V.
2. Each set of VCCIO pins (VCCIO1, VCCIO2, etc.) can be connected to 3.3 V, 2.5 V, 1.8 V, or 1.5 V.
Dedicated Pin Information for the MAX
®
II
EPM1270 / EPM1270G Devices
V
ersion 1.5
PT-EPM1270-1.5
Copyright © 2007 Altera Corp.
EPM1270 Dedicated
Page 1 of 11
Bank
Number
Pad Number
Orientation
Pin/Pad
Function
Optional
Function(s)
144-Pin TQFP 256-Pin FBGA 256-Pin MBGA
B1 0 VCCIO1
B1 1 GNDIO
B1 2 IO D3
E3
B1 3 IO C2 C2
B1 4 IO 1 E3 H2
B1 5 IO 2 C3 D3
B1 6 IO E4 C3
B1 7 IO 3 D2 D2
B1 8 IO E5 C4
B1 9 IO 4 D1 C1
B1 10 IO F3 F3
B1 11 IO 5 E2 B1
B1 12 VCCIO1
B1 13 GNDIO
B1 14 IO 6 F4
D4
B1 15 IO E1 D1
B1 16 IO F5 H4
B1 17 IO F2 F2
B1 18 IO 7 F6 G4
B1 19 IO 8 F1 E1
B1 20 IO G3 J2
B1 21 IO G2 G2
B1 22 IO G4 E4
B1 23 IO G1 E2
B1 24 VCCIO1
B1 25 GNDIO
B1 26 IO 11 G5
G3
B1 27 IO 12 H2 G1
B1 28 IO 13 G6 F4
B1 29 IO 14 H1 H1
B1 30 IO 15 H3 F1
B1 31 IO 16 J1 J1
32 GNDINT
B1 33 IO GCLK0 18 H5
K1
34 VCCINT
B1 35 IO GCLK1 20 J5
L1
B1 36 IO 21 H4 K2
B1 37 IO 22 J2 M1
B1 38 IO 23 J4 L2
B1 39 IO 24 K1 N1
B1 40 VCCIO1
B1 41 GNDIO
B1 42 IO J3
M2
B1 43 IO 27 K2 P1
B1 44 IO K6 N4
B1 45 IO L1 R1
B1 46 IO 28 K5 P4
B1 47 IO 29 L2 P2
B1 48 IO K4 R4
B1 49 IO M1 T1
B1 50 IO K3 N2
B1 51 IO 30 M2 U1
B1 52 IO L5 P3
B1 53 IO M3 R2
B1 54 VCCIO1
B1 55 GNDIO
B1 56 IO 31 L4
R3
I/O Pin Information for the MAX
®
II
EPM1270 / EPM1270G Devices
V
ersion 1.5
PT-EPM1270-1.5
Copyright © 2007 Altera Corp.
EPM1270 IO
Page 2 of 11