Altera User Flash Memory (ALTUFM) IP Core User Guide

2014.08.18

UG-040105

Send Feedback

The Altera User Flash Memory IP cores provide interface logic for a subset of parallel interface, serial

peripheral interface (SPI), inter-integrated circuit (I2C,) and the built-in dedicated user flash memory (UFM)

serial interface. This document describes the following integrated User Flash Memory IP cores:

• Altera User Flash Memory for I2C Interface Protocol (ALTUFM_I2C)

• Altera User Flash Memory for Parallel Interface Protocol (ALTUFM_PARALLEL)

• Altera User Flash Memory for SPI Interface Protocol (ALTUFM_SPI)

• Altera Serial Interface (ALTUFM_NONE)

This IP core is not supported for Arria 10 designs.Note:

Related Information

• Introduction to Altera IP Cores

• Altera IP Release Notes

Features

The ALTUFM IP core provides the following features:

• Up to 8K bits for non-volatile storage

• Two sectors for partitioned sector erase

• Interface protocols: parallel, SPI, I2C, and none (use dedicated UFM)

• Memory initialization using Memory Initialization File or HEX File

• Built-in oscillator that provides oscillator frequency for the user flash memory

• Program, erase, and busy signals

• Easy instantiation from the IP Catalog GUI

Device Support

The ALTUFM IP core supports the MAX

II and Max V devices.

ISO

9001:2008

Registered

and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other

words and logos identified as trademarks or service marks are the property of their respective holders as described at

www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with

Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes

no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly

agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published

information and before placing orders for products or services.

www.altera.com

101 Innovation Drive, San Jose, CA 95134

Resource Utilization and Performance

The ALTUFM IP core is only available for MAX II and MAX V devices. Resource usage is reported with

different interface options. Configuration mode settings described in the following tables are available in

the parameter editor.

Table 1: ALTUFM_SPI Resource Usage

UFM BlocksLogic ElementConfiguration Mode

(3)

Optimization

(2)

Access Mode

(1)

1147Base modeBalancedRead/write

172Base modeBalancedRead only

1134Extended modeBalancedRead/write

140Extended modeBalancedRead only

Notes to Table 1–1:

1. Choose the access mode option to configure the UFM to the required mode of operation. Choose a design

implementation that balances high performance with minimal logic usage. The balanced optimization

logic option is set in Analysis and Synthesis settings (Assignments menu).

2. Choose the configure mode to set the mode of access with SPI interface to the UFM block. Set this option

to Base Mode or Extended Mode depending on the widths of the address and data buses.

Table 2: ALTUFM_PARALLEL Resource Usage

UFM BlocksLogic ElementData WidthAddress WidthOptimization

(2)

Access Mode

(1)

188169BalancedRead/write

169169BalancedRead only

Notes to Table 1–2:

1. Choose the access mode option to configure the UFM to the required mode of operation.

2. Choose a design implementation that balances high performance with minimal logic usage. The balanced

optimization logic option is set in Analysis and Synthesis settings (Assignments menu).

Table 3: ALTUFM_NONE Resource Usage

UFM BlocksOptimization

(1)

Logic Elements

1Balanced3

Note to Table 1–3:

1. Choose a design implementation that balances high performance with minimal logic usage. The balanced