Freescale Semiconductor

Application Note

This application note explains th e various Flas h devices that

can interface with the i.MX25. It also explains how to

interface and configure the Flash devices.

Document Number: AN4016

Rev. 0, 03/2010

Contents

1. Boot Mode and Memory Interfaces . . . . . . . . . . . . . . . . . 2

2. Flash Devices and Connection Diagrams . . . . . . . . . . . . . 2

2.1. NAND Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.2. I

C EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2.3. SPI Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.4. SD/MMC Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.5. NOR Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Interfacing and Configuring the

i.MX25 Flash Devices

by Multimedia Ap plications Division

Freescale Semiconductor, Inc.

Austin, TX

Interfacing and Configuring the i.MX25 Flash Devices, Rev. 0

2 Freescale Semiconductor

Boot Mode and Memory Interfaces

1 Boot Mode and Memory Interfaces

The i.MX25 can boot from an external device. It can also download from the Flash memory using the serial

full-speed Universal Serial Bus (USB), USB On-The-Go (OTG), or Universal Asynchronous

Receiver/Transmitter (UART) connection. See i.MX25 Boot Options (AN3684), for information on the

boot modes and eFUSEs.

The i.MX25 can interface to the following m emorie s :

• NAND FLASH by the Near Field Communication (NFC)

• NOR FLASH / PSRAM by the WEIM

• SD / MCC by eSDHC

• EEPRO M / Serial FLASH by the SPI interface

• EEPROM by the I

C Inte rface

Before customizing the Advanced Tool Kit (ATK), check if the hardware support is available in the latest

ATK tool release. See the ATK User Guide Standard Version document for a list of supported i.MX

platforms and ha rdwares.

2 Flash Devices and Connection Diagrams

The various Flash devices and their connection diagrams are described in the following sections.

2.1 NAND Flash

The i.MX25 supports single-level cell (SLC) and multi-level c ell (MLC) NAND Flash products of up to

64 Kbyte blocks.

• SLC—512 bytes per page, 16 Kbytes per block and me mory size up to 8 Gbits

• SLC—2 Kbytes per page, 128 Kbytes per block and memory size up to 64 Gbits

• MLC— 4 Kbytes per page, 512 Kbytes per block and memory size up to 256 Gbits

The size of spare bytes for the 4 Kbytes page size NAND can be 128 or 218 bytes for booting. The NAND

bus can be 8 or 16-bits. Also, the i. MX25 supports Open NAND Flas h Interface (ONFI) 1.0 devices.

The i.MX25 PDK impl em entation uses an SLC or MLC with an 8-bit data bus. By default, PDK us es the

SLC K9LAG08UOM-2 Gbyte Samsung device. If MLC is to be used, when the PDK is connected to the

signals f or tha t option, then a level sh ifte r or a tra nsceiver is required for the clock enable (CE) signals to

meet the voltage level of the memory. The CE1, CE2, and CE3 signals belong to a diff erent power rail

from the DATA and command signals from the NFC that are listed below:

• NVCC_NFC: 3.3 V

• NVCC_EM1: 1.8 V