PF1550
Power management integrated circuit (PMIC) for low power
application processors
Rev. 4.0 — 28 September 2018 Data sheet: advance information
1 General description
The PF1550 is a power management integrated circuit (PMIC) designed specifically for
use with i.MX processors on low-power portable, smart wearable and Internet-of-Things
(IoT) applications. It is also capable of providing full power solution to i.MX 7ULP, i.MX
6SL, 6UL, 6ULL and 6SX processors.
With three high efficiency buck converter, three linear regulators, RTC supply, and
battery linear charger, the PF1550 can provide power for a complete battery-powered
system, including application processors, memory, and system peripherals.
1.1 Features and benefits
This section summarizes the PF1550 features:
Input voltage range to PMIC VBUSIN pin via USB bus or AC adapter: 4.1 V to 6.0 V
Buck converters:
SW1, 1.0 A; 0.6 V to 1.3875 V in 12.5 mV steps, or 1.1 V to 3.3 V in variable steps
SW2, 1.0 A; 0.6 V to 1.3875 V in 12.5 mV steps, or 1.1 V to 3.3 V in variable steps
SW3, 1.0 A; 1.8 V to 3.3 V in 100 mV steps
Soft start
Quiescent current 1.0 μA in ULP mode with light load
Peak efficiency > 90 %
Dynamic voltage scaling on SW1 and SW2
Modes: forced PWM quasi-fixed frequency mode, adaptive variable-frequency mode
Programmable output voltage, current limit and soft start
LDO regulators
LDO1, 0.75 to 1.5 V/1.8 to 3.3 V, 300 mA with load switch mode
LDO2, 1.8 to 3.3 V, 400 mA
LDO3, 0.75 to 1.5 V/1.8 to 3.3 V, 300 mA with load switch mode
Quiescent current < 1.5 μA in Low-power mode
Programmable output voltage
Soft start and ramp
Current limit protection
Battery charger
Supports single-cell Lithium Ion/Lithium Polymer batteries
Linear charging (10 mA to 1500 mA input limit)
Up to 6.5 V input operating range
VSYS regulator can withstand transient and DC inputs from 0 V up to +22 V
Programmable charge voltage (3.5 V to 4.44 V)
Programmable charge current (100 mA to 1000 mA)
Programmable charge termination current (5.0 mA to 50 mA)
NXP Semiconductors
PF1550
Power management integrated circuit (PMIC) for low power application processors
PF1550 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Data sheet: advance information Rev. 4.0 — 28 September 2018
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Integrated 50 mΩ battery isolation MOSFET for operation with no/low battery
Battery supplement mode
Battery discharge overcurrent protection, up to 3.0 A
USB_PHY low dropout linear regulator
Programmable LED driver (status indicator)
JEITA compliant battery temp sensing and charger control
Key charging parameters can be configured and permanently stored in OTP
I
2
C Control Interface permitting processor control and event detection
LDO/switch supply
RTC supply VSNVS 3.0 V, 2.0 mA
Battery backed memory including coin cell charger
DDR memory reference voltage, VREFDDR, 0.5 to 0.9 V, 10 mA
OTP (One time programmable) memory for device configuration
User programmable start-up sequence, timing, soft-start and power-down sequence
Programmable regulator output voltages and charger parameters
I
2
C interface
User programmable Standby, Sleep/Low-power, and Off (REGS_DISABLE) modes
Ambient temperature range −40 °C to 105 °C
1.2 Applications
Smart mobile/wearable devices
Low-power IoT applications
Wireless game controllers
Embedded monitoring systems
Home automation
POS
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