Revision B, 11.09.02 Page1of12
ANALOG IP BLOCK
CDAC10 - CMOS 10-Bit D/A CONVERTE R
DATA SHEET
FEATURES
! Small Area: < 1.05mm
2
! Size: x = 1550µm y = 680µm
! Supply Voltage: 3.0V to 3.6V
! Junction Temp. Range: –40 to 125°C
! Resolution: 10-Bit
! Update Rate: 200MS/s
! Diff. Current Outputs: 10 to 25mA
! Power Dissipation of 153mW @ 3.3V Supply Voltage
in LS mode
DESCRIPTION
The CDAC10 is a 10-bit high-resolution high-speed
CMOS digital-to-analog converter (DAC).
The CDAC10 uses a segmented current steering architecture
combined with a simple and fast decoding logic to achieve a very high
update rate, 10-bit of intrinsic static accuracy, and good dynamic
characteristics.
The CDAC10 is a differential current output DAC with a typical full-
scale current of 20mA. The output currents can be used to directly
drive two external resistors to obtain two complementary output
voltages, or they can be used to drive an external transformer (or
amplifier) to obtain a single-ended output voltage.
V
DDD
V
DDS
V
DDA
V
SSD
V
SSS
V
SSA
INPUT REGENERATION
B
9
B
8
B
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
ROW DECODER
COLUMN DECODER
6 MSB SWITCHES
CURRENT
SOURCE ARRAY
4LSB
SWITCHES
4LSB
CURRENT
SOURCES
BIAS
GENERATION
CLK
IOUTN IOUTP IBIASVBIASC
V
RES
PROCESS
C35B3 (0.35um)
Datasheet : CDAC10 - C35
Revision B, 11.09.02 Page2of 12
TECHNICAL DATA FOR HS MODE
(Tjunction=–40 to 125°C, VDDA=VDDD=+3.0V to +3.6V, fclk=200MHz, R
L
=50, unless otherwise specified)
DC SPECIFICATIONS
Symbol Parameter Conditions Min Typ Max Units
Resolution 10 bit
DNL Differential Linearity Error –1
±0.4
+1 LSB
INL Integral Linearity Error –1
±0.4
+1 LSB
REFERENCE INPUT
Symbol Parameter Conditions Min Typ Max Units
IBIAS Reference Current –I
FS
/16 –I
FS
/16 –I
FS
/16 mA
ANALOG OUTPUT
Symbol Parameter Conditions Min Typ Max Units
OFFSETB Offset Error –5 0 +5 %FS
FSERR Full-Scale Error –10 2 +10 %FS
I
FS
Full-Scale Output Current 10 20 25 mA
V
FS
Output Compliance Range 1 1.25 V
R
out
Output Resistance 30
k
C
out
Output Capacitance 15 pF
f
outmax
Max. Output Signal Frequency 30 MHz
AC ACCURACY (fclk=200MHz)
Symbol Parameter Conditions Min Typ Max Units
THD Total Harmonic Distortion f
out
=1MHz –73 dBc
THD Total Harmonic Distortion f
out
=10MHz –55 dBc
THD Total Harmonic Distortion f
out
=30MHz –55 dBc
SFDR Spurious Free Dynamic Range f
out
=1MHz 70 dBc
SFDR Spurious Free Dynamic Range f
out
=10MHz 58 dBc
SFDR Spurious Free Dynamic Range f
out
=30MHz 56 dBc
AC ACCURACY (fclk=100MHz)
Symbol Parameter Conditions Min Typ Max Units
THD Total Harmonic Distortion f
out
=0.5MHz –78 dBc
THD Total Harmonic Distortion f
out
=5MHz –60 dBc
THD Total Harmonic Distortion f
out
=15MHz –60 dBc
SFDR Spurious Free Dynamic Range f
out
=0.5MHz 72 dBc
SFDR Spurious Free Dynamic Range f
out
=5MHz 66 dBc
SFDR Spurious Free Dynamic Range f
out
=15MHz 61 dBc
TT-IMD Two-Tone Third Order Intermodulation
Distortion
f
out1
=10MHz
1)
f
out2
=11MHz
–62 dBc
TT-SFDR Two-Tone
Spurious Free Dynamic Range
f
out1
=10MHz
1)
f
out2
=11MHz
62 dBc
1)
Both signals, f
out1
and f
out2
, have an amplitude of –6dB full scale.