WP404 (v1.0.1) March 6, 2012 www.xilinx.com 1
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Today's tactical and commercial Software Defined
Radios must have the flexibility and processing
power to support a growing number of wideband
and broadband waveforms, including an extensive
library of legacy waveforms. The secure Xilinx®
Zynq™-7000 extensible processing platform (EPP)
provides an ideal solution for these applications, not
only because it features a high-performance
processing system (PS) that leverages ARM®
technology, but also because it provides a large
programmable logic (PL) unit that supports Partial
Reconfiguration and the Xilinx Isolation Design
Flow (IDF)—all within a single device.
This white paper describes how the features of the
Zynq-7000 Extensible Processing Platform (EPP) can
provide a flexible waveform processing platform,
using a Software Defined Radio example. Topics
include a description of the Zynq-7000 architecture,
how to use the Partial Reconfiguration and IDF
capabilities of the PL to support various waveforms
and reduce part count, and the power management
features of the Zynq-7000 device.
White Paper: Zynq-7000 EPPs
WP404 (v1.0.1) March 6, 2012
Flexible Waveform Processing
with the Xilinx Zynq-7000
Extensible Processing Platform
By: Anita Schreiber
2 www.xilinx.com WP404 (v1.0.1) March 6, 2012
Introduction
Introduction
Figure 1 shows an example block diagram of a tactical SDR. The plain text (PT) portion
of the radio (sometimes referred to as the "red" side because the information is
unencrypted and can be classified) contains a General Purpose Processor (GPP) and
"red" FPGA. The PT information is encrypted and transformed into Cipher Text (CT).
The CT information is then processed by the "black" side. The black side (encrypted) of
the radio contains a "black" FPGA, another GPP, and a FPGA for waveform processing
(Modem FPGA). To ensure the security of the information, the PT and CT portions of
the radio are isolated and separated to prevent an information leak of classified or
sensitive information out of the system in plain text.
Therefore, a typical SDR implementation can use three different FPGAs as well as two
separate GPPs, making the device count for these functions as high as five. The
Modem FPGA must be sized appropriately to process all of the various waveforms
supported by the radio because it is often required to have all the functions available
simultaneously, even if only one is needed at a time. For example, processing the
Soldier Radio Waveform (SRW) requires ~120K logic cells, 8 Mb of RAM, and 800 DSP
slices. The Mobile User Objective System (MUOS) waveform requires >200K logic
cells, 10 Mb of RAM, and 900 DSP slices, requiring the Modem FPGA to be quite large.
Also, the red FPGA in the Crypto subsystem must also be large enough to contain all
of the various cryptographic algorithms for the associated waveforms. The required
number of devices, the amount of I/O signaling between the devices (which increases
power dissipation), and the large logic density of the devices (which increases static
current) make this is a non-optimal solution in terms of size, weight, power, and cost
(SWAP-C).
With the Zynq-7000 EPP, the Modem FPGA, black FPGA, red FPGA, black GPP, and
red GPP can all be combined into one device (see Figure 2). The Zynq-7000 EPP
enables the combination and integration of these devices into a single device and
provides a flexible, secure SDR solution that reduces SWAP-C.
X-Ref Target - Figure 1
Figure 1: Example SDR Block Diagram
WP401_01_090211
Rx
Analog RF
Tx
ADC
Digital RF
Red Side
Crypto
Subsystem
Black Side
CT
Clocks
DUC
/
DDC
Modem
FPGA
Local
Memory
Modem
DSP
GPP
Local
Memory
Black
FPGA
Flash
and
SRAM
Crypto
Crypto
Accelerator
Shared
Memory
Waveform
Memory
Common Bus
PT
Voice
Codec
Local
Memory
Voice
DSP
GPP
Local
Memory
Red
FPGA
Shared
Memory
Waveform
Memory
DAC
Common Bus