AN933.2: EFR32 Series 2 Minimal BOM
■Silicon Labs reference radio board designs typically use an extensive number of components and multiple layers for RF and VDD filtering to achieve the best possible RF performance at even the highest output power levels. So, the number of PCB layers can be decreased and many of these elements can be eliminated from the design while still maintaining an acceptable RF performance, especially at the lower power levels. This document shows an absolute cost-optimized solution for the EFR32 Series 2 devices targeting high-volume and cost-sensitive applications, mainly applicable for Bluetooth Smart (i.e., BLE) and Zigbee applications at the 2.4 GHz frequency band, where the maximum allowed fundamental RF power is generally lower and the design is typically space-constrained, such as for wearable applications. This application note includes measured data with several different and simplified VDD filtering approaches at the 2.4 GHz frequency region. The RF front-end matching principles are described in more detail in the application note, AN930.2: EFR32 Series 2 2.4GHz Matching Guide. The RF performance also strongly depends on the PCB layout as well as the design of the matching networks. For optimal performance, Silicon Labs also recommends using the PCB layout design guidelines described in the application note, AN928.2: EFR32 Series 2 Layout Design Guide.
●KEY POINTS
■BOM, cost, and PCB space-optimized reference design for 2.4 GHz applications
■Eliminates a number of components for RF and VDD domains while maintaining acceptable RF performance
■Measurement results for RX sensitivity, TX performance, and harmonics are provided
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