Novel Devices to Overcome Planar Limits and Enable Novel Circuits

PublishTime：2022-05-19

Planar CMOS technology has revolutionized the electronics industry over the last few decades. Rapid and predictable miniaturization was predicted by Moore’s law; this has allowed the semiconductor industry to make new products with added functions with each new generation of technology. Most commercial products are now in the 90nm technology node as defined by ITRS, with work on 65nm and 45nm nodes progressing rapidly. This predictable scaling is now reaching its limit and has forced the industry to look to novel device architectures beyond the 45 nm technology node.
In all these years of digital CMOS innovation and scaling, we have only scratched the surface of the semiconductor substrate. The Planar CMOS device—the workhorse of digital applications used in modern electronic systems—have a channel only on the surface of the silicon. These devices have a single gate on the surface of the silicon to modulate the channel on the surface of the semiconductor. Scaling of these planar devices has now begun to hit its limits for power, noise, reliability, parasitic capacitances and resistance. New device architectures using multiple sides of the semiconductor—not just the planar surface—offer a path to overcome these performance limits. In addition, these non-planar CMOS devices enable new circuits previously not possible with single gate CMOS devices.

Brand of Product：	NXP
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Product Category：	Planar CMOS More
Application：	More
Data Type：	White Paper More
Safety & Environment Standards：	More
Operating Temperature：	Please see the document for details
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Qualification Approval：	More
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Language：	English Chinese Chinese and English Japanese
Date of Creation：	2006/7/27
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Data Size：	632 KB

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